DLA SMD-5962-91740 REV A-2009 MICROCIRCUIT CMOS 16 BIT DIGITAL-TO-ANALOG MULTIPLYING CONVERTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. drw 09-06-02 Joseph Rodenbeck THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREP

2、ARED BY Dan Wonnell CHECKED BY Sandra Rooney DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

3、92-10-15 MICROCIRCUIT, CMOS, 16 BIT, DIGITAL-TO-ANALOG MULTIPLYING CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-91740 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E271-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

4、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space

5、application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 596

6、2 - 91740 01 M R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified

7、RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types identify the circui

8、t function as follows: Device type Generic number Circuit function INL, DNLtest 01 MP7636AT CMOS 16-bit D/A multiplying converter 2.0 LSB 02 MP7636AS CMOS 16-bit D/A multiplying converter 4.0 LSB 1.2.3 Device class designator. The device class designator is a single letter identifying the product as

9、surance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outl

10、ine. The case outline is as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for de

11、vice class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Vol

12、tage range at any digital input. GND 0.5 V to VDD+ 0.5 V Voltage at VREFinput 25 V DC voltage range applied to IOUT1or IOUT2GND 0.5 V to +17 V Supply voltage (VDD) +17 V Power dissipation (PD) up to TA= 75C 450 mW 2/ Lead temperature (soldering, 10 seconds). 300C Storage temperature range. -65C to +

13、150C Thermal resistance, junction-to-ambient (JA) 63C/W Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Positive supply voltage (VDD) . 15 V Reference input voltage (VREF). 10 V Ambient operating temperature range (TA) -55C to +125C Input capacitanc

14、e data control (CIn) . 5 pF Current settling time (tS). 2 s Feedthrough error (FT) 2 mV p-p 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwi

15、se specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-18

16、35 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Stan

17、dardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersed

18、es applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Derate 6 mW/C above TA= 75C. Provide

19、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual ite

20、m requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item re

21、quirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for de

22、vice classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as s

23、pecified on figure 2. 3.2.4 Timing diagrams. The write cycle timing diagrams shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter

24、 limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part

25、 shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using

26、 this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and

27、 V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in or

28、der to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA pri

29、or to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance.

30、A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-

31、VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers fa

32、cility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appen

33、dix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteris

34、tics. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits 2/ Unit unless otherwise specified Min Max Resolution RES VDD= +15 V 1, 2, 3 All 16 Bits Integral nonlinearity INL1 01 -2.0 +2.0 LSB 02 -4.0 +4.0 2, 3 All -4.0 +4.0 Differential nonlinearity DNL1, 2, 3 01 -2.0 +2.0 LSB

35、 02 -4.0 +4.0 Gain error AE1 All -0.10 +0.10 %FSR 2, 3 -0.15 +0.15 Gain error coefficient TCGE3/ 1, 2, 3 All +2.0 ppm/CPower supply rejection ratio PSRR VDD= 5 percent 1, 2, 3 All -0.005 +0.005 %/% Output leakage current IOUTIOUT1only 1 All -10 +10 nA 2, 3 -200 +200 Input resistance RIN1, 2, 3 All 2

36、.5 7.5 k Input high voltage VIH1, 2, 3 All 2.4 V Input low voltage VIL1, 2, 3 All 0.8 V Input current high and low IIN1, 2, 3 All -1.0 +1.0 A Functional voltage range VDD1, 2, 3 All 10.5 16.5 V Supply current IDDDigital inputs VILor VIH1, 2, 3 All 2.0 mA Digital inputs 0 V or VDD1.0 See footnotes at

37、 end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance cha

38、racteristics - continued. Test Symbol Conditions 1/ -55C TA+125C Group A subgroups Device type Limits 2/ Unit unless otherwise specified Min Max Analog output capacitance COUT1Digital = all 1s 4 All 280 pF Digital = all 0s 120 COUT2Digital = all 1s 100 Digital = all 0s 240 CS to WR setup time tCS4/

39、5/ 9, 10, 11 All 150 ns CS to WR hold time tCH4/ 5/ 9 All 10 ns 10, 11 20 Data valid to WR setup time tDS4/ 5/ 9, 10, 11 All 70 ns Data valid to WR hold time tDH4/ 5/ 9, 10, 11 All 70 ns WR , XFER pulse width tW4/ 5/ 9, 10, 11 All 150 ns 1/ Unless otherwise noted; VDD= +15 V, VREF= +10 V. 2/ The alg

40、ebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal. 3/ Inherent, not tested. 4/ Shall be guaranteed if not tested. 5/ See timing diagram, figur

41、e 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device types 01, 02 Case outline R Terminal n

42、umber Terminal symbol 1 CS 2 WR1 3 AGND 4 DB11 (DB3) 5 DB10 (DB2) 6 DB9 (DB1) 7 DB8 (DB0, LSB) 8 VREF9 RFB10 DGND 11 IOUT112 IOUT213 DB15, MSB (DB7) 14 DB14 (DB6) 15 DB13 (DB5) 16 DB12 (DB4) 17 XFER 18 WR2 19 BYTE1/ BYTE2 20 VDDFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduc

43、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 2. Block diagram. FIGURE 3. Timing diagrams. Provided by IHSNot for ResaleNo reprod

44、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91740 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and in

45、spection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in a

46、ccordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with meth

47、od 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A. The test circuit shall be maintained by the manufacturer under document revision lev

48、el control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or appr