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本文(DLA SMD-5962-92012 REV B-2008 MICROCIRCUIT MEMORY DIGITAL BIPOLAR 12 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER (FPLS) MONOLITHIC SILICON.pdf)为本站会员(roleaisle130)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92012 REV B-2008 MICROCIRCUIT MEMORY DIGITAL BIPOLAR 12 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER (FPLS) MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 02-02-22 Raymond Monnin B Boilerplate update, part of 5 year review. ksr 08-05-16 Robert M. Heber REV SHET REV B B B SHEET 15 16 17 REV STATUS REV B B B B B B B B B B B B

2、 B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Kenneth Rice COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael Fr

3、ye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 92-12-29 MICROCIRCUIT, MEMORY, DIGITAL, BIPOLAR, 12 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER (FPLS), MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-92012 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E357-08 P

4、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two prod

5、uct assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RH

6、A) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92012 01 M L A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2

7、.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A

8、 dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 PLS168 12 x 48 x 8 field programmable logic sequencer 1.2.3 Device class designator. The device class designator is a single letter

9、identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL

10、-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and

11、V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97

12、 1.3 Absolute maximum ratings. 1/ Output voltage (VO) . 5.5 V dc Supply voltage (VCC) . 7.0 V dc Input voltage (VI) . 10 V dc Storage temperature range . -65C to +150C Maximum power dissipation (PD) 2/ . 900 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC

13、): Case L See MIL-STD-1835 Junction temperature (TJ) +200C Output sink current . 100 mA Input current (minimum) . -30 mA Input current (maximum) +30 mA 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc Case operating temperature range (TC) . -55C to +125C Minimum

14、high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise

15、specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835

16、- Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standar

17、dization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes

18、applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added PDdue to short

19、-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item

20、 requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as describ

21、ed herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified i

22、n MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table.

23、The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiat

24、ion parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking

25、. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA pro

26、duct using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device cla

27、sses Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufact

28、urer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to D

29、SCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of con

30、formance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notificatio

31、n to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufa

32、cturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 14 (see MIL-PRF-38

33、535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance

34、characteristics. Limits Units Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device types Group A Subgroups Min Max Low level input voltage VILVCC= 4.5 V All 1, 2, 3 0.8 V High level input voltage VIHVCC= 5.5 V All 1, 2, 3 2 V Input clamp voltage 2/ VICVCC= 4.5 V,

35、 II= -18 mA All 1, 2, 3 -1.2 V Low level input current IILVCC= 5.5 V, VI= 0.45 V All 1, 2, 3 -150 A Low level input current (CLK input) IILVCC= 5.5 V, VI= 0.45 V All 1, 2, 3 -350 A High level input current IIHVCC= 5.5 V, VI= 5.5 V All 1, 2, 3 50 A Low level output voltage 3/ VOLVCC= 4.5 V, VIL= 0.8

36、V, VIH= 2 V, IOL= 9.6 mA All 1, 2, 3 0.5 V High level output voltage 4/ VOHVCC= 4.5 V, VIL= 0.8 V, VIH= 2 V, IOH= -2 mA All 1, 2, 3 2.4 V Output short-circuit current 2/ 5/ IOSVCC= 5.5 V, V0= O V All 1, 2, 3 -15 -85 mA DC supply current 6/ ICCVCC= 5.5 V All 1, 2, 3 185 mA VOUT= 5.5 V All 1, 2, 3 60

37、A Three-state output current 7/ IOZVCC= 5.5 V VOUT= 0.45 All 1, 2, 3 -60 A Functional tests See 4.4.1d All 7, 8 Frequency (w/o C-array) fmaxAll 9, 10, 11 10.5 MHz Propagation delay: Clock tCKOVCC= 5.0 V 10% R1= 470, R2= 1 k, CL= 50 pF See figures 4 and 5 All 9, 10, 11 35 ns Output enable tOE1All 9,

38、10, 11 40 ns Output disable tOD1To prevent spurious clocking, clock rise time (10%-90%) 30 ns All 9, 10, 11 40 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE S

39、UPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device types Group A Subgroups Min Max Units Preset/re

40、set tPROVCC= 5.0 V 10% R1= 470, R2= 1 k, CL= 50 pF All 9, 10, 11 45 ns Power-on preset tPPRSee figures 4 and 5 All 9, 10, 11 20 ns Pulse width: Clock high tCKHTo prevent spurious clocking, clock rise time (10%-90%) 30 ns All 9, 10, 11 40 ns Clock low tCKLAll 9, 10, 11 40 ns Period (w/o C-array) tCKP

41、1All 9, 10, 11 95 ns Preset/reset pulse tPRHAll 9, 10, 11 40 ns Setup time: Input tIS1All 9, 10, 11 60 ns Input (through complement array) 8/ tIS2All 9, 10, 11 100 ns 1/ All voltage values are with respect to ground. 2/ Test one at a time. 3/ Measured with a programmed logic condition for which the

42、output is at a low logic level, and VILapplied to PR/OE output sink current is applied through a resistor to VCC. 4/ Measured with VILapplied to OE and a logic high stored, or with VIHapplied to PR. 5/ Duration of short circuit should not exceed 1 second. 6/ ICCis measured with the PR/ OE input grou

43、nded, all other inputs at 4.5 V, and the outputs open. 7/ Measured with VIHapplied to PR/ OE . 8/ Not testable on unprogrammed devices. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CEN

44、TER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline L Terminal number Terminal symbol 1 CK 2 I53 I44 I35 I26 I17 I08 F09 F110 F2/P411 F3/P512 GND 13 P0/P614 P1/P715 P2/P816 P3/P917 PR/ OE 18 I1119 I1020 I921 I822 I723 I624 VCCFIGURE 1. Te

45、rminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 OPTION VCCPR OE IOCK S R QP/FF

46、 +5 V H X X X H H L +10 V X X X Qn (QP)n L X X X X Qn (QF)n H X X X Qn HI-Z L +10 V X X X Qn (QP)n L X X X X Qn (QF)n L X L L Qn (QF)n L X L H L L L X H L H H L X H H IND IND X X X X X X H NOTES: 1. Positive logic: S/R = T0+ T1+ T2+ . + T47. 2. Either preset (active-HIGH) or ENABLE OUTPUT (active-LO

47、W) are available, but not both. The desired function is a user programmable option. 3. denotes transition from LOW to HIGH level. 4. R = S = HIGH is an illegal input condition. 5. = H/L/+10 V. 6. X = dont care ( 5.5 V). FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networkin

48、g permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92012 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

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