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本文(DLA SMD-5962-92023 REV B-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT BUS TRANSCEIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(roleaisle130)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92023 REV B-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS 16-BIT BUS TRANSCEIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE F8859. Add case outline Y. Add device type 02. Add section 1.5, radiation features. Add delta limits to table III for device type 02. Update the boilerplate to add radiation hardness assurance requirements, to remove classes B and

2、 S criteria, and to reflect the changes in accordance with MIL-PRF-38535 requirements. Editorial changes throughout. jak 04-05-24 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 11-04-19 David J. Corbett REV SHET REV B B B B B B SHEET 15 16 17 18 19 20

3、 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Wanda L. Meadows DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF

4、 THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 16-BIT BUS TRANSCEIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-02-23 REVISION LEVEL B SIZE A CAGE CODE 67268 596

5、2-92023 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E313-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1.

6、 SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When availa

7、ble, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 92023 01 V Y A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish

8、 (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and ar

9、e marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACT16245 16-bit bus transceiver with three-state outputs,TTL compatible inputs 02 5

10、4ACT16245 16-bit bus transceiver with three-state outputs,TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirem

11、ents for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator

12、Terminals Package style X GDFP1-48 48 Flat pack Y See figure 1 48 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic

13、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc Input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V

14、dc Output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Input clamp current (IIK) (VIN VCC) . 20 mA DC output clamp current (IOK) (VOUT VCC) 50 mA DC output current (IOUT) (VOUT= 0 to VCC) (per output pin) 50 mA DC VCCor GND current (ICC, IGND) . 400 mA 3/ Storage temperature range (TSTG) . -65C

15、 to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): Case outline X . See MIL-STD-1835 Case outline Y . 22C/W Junction temperature (TJ) +175 C Case operating temperature range (TC) . -55C to +125C 1.4 Recommended

16、operating conditions. 2/ 4/ 5/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCMaximum low level input voltage (VIL) 0.8 V dc Minimum high level input voltage (VIH) . 2.0 V dc Case operating temperature range (

17、TC) . -55C to +125C Input rise and fall rate (tr, tf) maximum: (10% to 90% of VIN, 90% to 10% of VIN) 10ns/V Maximum high level output current (IOH) .-24 mA Maximum low level output current (IOL) .+24 mA 1.5 Radiation features. Device type 02: Maximum total dose available (dose rate = 50 300 rads (S

18、i)/s) 300 krads (Si) Single Event Latchup (SEL) occurs at LET (see 4.4.4.2) . 93 MeV-cm2/mg 6/ Single Event Upset (SEU) occurs at LET (see 4.4.4.2) 93 MeV-cm2/mg 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may de

19、grade performance and affect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ For packages with multiple VCCand GND pins, t

20、his value represents the maximum total current flowing into or out of all VCCand GND pins. 4/ Unless otherwise specified, the limits for parameters listed herein shall apply over the full VCCand TCrecommended operating range. 5/ Unused or floating inputs should be held high or low. 6/ Limits obtaine

21、d during technology characterization/qualification, guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRC

22、UIT DRAWING SIZE A 5962-92023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent

23、 specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method S

24、tandard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla

25、.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these do

26、cuments cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. JEDEC Standard No. 78 - IC Latch-Up Test. (Copies of these documents are available onli

27、ne at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothin

28、g in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device man

29、ufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herei

30、n. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordan

31、ce with 1.2.4 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Ground bounce waveforms

32、and test circuit. The ground bounce waveforms and test circuit shall be as specified on figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION

33、 LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 6. 3.2.7 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level contro

34、l and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in

35、table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PI

36、N listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA design

37、ator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ a

38、s required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the require

39、ments of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listi

40、ng as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certifica

41、te of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Mar

42、itime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain

43、the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit

44、group number 37 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE IA.

45、Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Device type and 4/ device class VCCGroup A subgroups Limits 5/ Unit Min Max Positive input clamp voltage 3022 VIC+For input under test,

46、IIN= 1.0 mA All Q, V GND 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -1.0 mA All Q, V Open 1 -0.4 -1.5 V High level output voltage 3006 VOH1For all inputs affecting output under test, VIN= 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A All All 4.5 V 1,

47、 2, 3 4.4 V VOH2For all inputs affecting output under test, VIN= 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A All All 5.5 V 1, 2, 3 5.4 VOH3 For all inputs affecting output under test, 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOH= -24 mA 01 All 4.5 V 1 3.94 2, 3 3.7 02 All

48、 1, 2, 3 3.7 VOH4For all inputs affecting output under test, 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOH= -24 mA 01 All 5.5 V 1 4.94 2, 3 4.7 02 All 1, 2, 3 4.7 VOH56/ For all inputs affecting output under test, 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOH= -50 mA All All 5.5 V

49、1, 2, 3 3.85 Low level output voltage 3007 VOL1For all inputs affecting output under test, VIN= 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOL= 50 A All All 4.5 V 1, 2, 3 0.1 V VOL2For all inputs affecting output under test, VIN= 2.0 V or 0.8 V For all other inputs VIN= VCCor GND IOL= 50 A All All 5.5 V 1, 2, 3 0.1

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