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本文(DLA SMD-5962-92124 REV B-2013 MICROCIRCUIT LINEAR CMOS LOW POWER INVERTING SWITCHING REGULATOR MONOLITHIC SILICON.pdf)为本站会员(eveningprove235)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92124 REV B-2013 MICROCIRCUIT LINEAR CMOS LOW POWER INVERTING SWITCHING REGULATOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. Replaced reference to MIL-STD-480 with reference to MIL-PRF-38535. -rrp 04-02-10 R. MONNIN B Add terminal symbol descriptions to figure 1. Make correction to figure 1 by deleting “LBO” and replacin

2、g with “LBD”. Update document paragraphs to current MIL-PRF-38535 requirements. - ro 13-09-12 C. SAFFLE REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY MARCIA KELLEHER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandma

3、ritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY CHARLES E. BESORE APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, CMOS, LOW POWER, INVERTING SWITCHING REGULATOR, MONOLITHIC SILICON DRAWING APPROV

4、AL DATE 93-06-08 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-92124 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E406-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92124 DLA LAND AND MARITIME COLUMB

5、US, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and

6、 are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92124 01 M P A Federal stock class designator RHA designator (see 1.2.1) Device type (s

7、ee 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked

8、devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 MAX634 Low powe

9、r, inverting switching regulator 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class l

10、evel B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8

11、8 Dual in line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

12、2124 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage (+VSto GND) 18.0 V dc Input voltage (LBR, CX, VFB) . -0.3 V to (+VS+ 0.3 V) 3/ Output current (LX) 525 mA peak Output current (LBO) . 50 mA Power dis

13、sipation: Up to +70C . 640 mW Derate above +70C 8 mW/C Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) . 125C/W 1.4 Recommend

14、ed operating conditions. Supply voltage range (+VS) . 2.3 V to 16.5 V dc Ambient operating temperature range (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the e

15、xtent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Met

16、hod Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch

17、.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this do

18、cument, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ TA= +25C, u

19、nless otherwise specified. 3/ In addition to the absolute maximum rating of +18 V, the input voltage must not exceed 24 V - VOUT and the input rating may be exceeded if the input current is limited to 1 mA or less. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

20、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92124 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as

21、specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for no

22、n-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Cas

23、e outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation param

24、eter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be t

25、he subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible d

26、ue to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accorda

27、nce with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of complian

28、ce. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as

29、 an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of M

30、IL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each

31、 lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Veri

32、fication and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the opti

33、on of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 76 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

34、RD MICROCIRCUIT DRAWING SIZE A 5962-92124 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions +VS= 5.0 V, GND = 0.0 V -55C TA +125C unless otherwise specified Group A subgroups Device t

35、ype Limits 1/ Unit Min Max Supply current IIN+VS= 5.0 V, no external load, LXoff 1,2,3 01 150 A +VS= 15.0 V, no external load, LXoff 500 Reference voltage VREF1 01 1.22 1.28 V 2,3 1.18 1.32 Output voltage -VOUTR1 = 300 k, R2 = 75 k, 1 01 -5.20 -4.80 V when VOUTnom = -5.0 V 2,3 -5.25 -4.75 R1 = 900 k

36、, R2 = 75 k, 1 -15.70 -14.30 when VOUTnom = -15.0 V 2,3 -16.00 -14.00 Line regulation 2/ VRLINEVOUTnom = -5.0 V, 1 01 2.0 %VOUT+VS= 5.0 V to 15.0 V, 2,3 3.0 R1 = 300 k, R2 = 75 k Load regulation 2/ VRLOADR1 = 300 k, R2 = 75 k, 1 01 0.4 %VOUTIL= 1 mA to 15 mA, 2,3 0.5 VOUTnom = -5.0 V Operating frequ

37、ency fOTA= +25C 3/ 1 01 0.1 75 kHz range LX leakage current ILXVLX= -18.0 V 1 01 1.0 A 2,3 20 Low battery input bias current ILRBTA= +25C 1 01 10 nA Feedback input bias current IFBTA= +25C 1 01 10 nA Low battery output current ILBOVLBO= 0.4 V, VLBR= 1.15 V 1,2,3 01 500 A Low battery output leakage c

38、urrent ILBOLVLBO= 16.5 V, 1,2,3 01 3 A VLBR= 1.35 V 1/ The algebraic convention, whereby the most negative value is a minimum and the most positive is a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal. 2/ Guaranteed by correlati

39、on with dc pulse measurements. 3/ This parameter is guaranteed by design, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92124 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B

40、 SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline P Terminal number Terminal symbol Description 1 LBR Low battery detection comparator input. The LBD output, pin 2, sinks current when this pin is below the low battery detector threshold of 1.25 V. 2 LBD Low battery detector output is an ope

41、n drain N-channel metal oxide semiconductor field effect transistor (MOSFET) which sinks current when the LBR input, pin 1, is below 1.25 V. 3 CXAn external capacitor connected between this terminal and ground sets the oscillator frequency. 47 pF = 40 kHz. 4 GND Ground. 5 LXExternal inductor output

42、driver. The internal P-channel MOSFET which drives this pin has an output resistance of 8 and a peak current rating of 525 mA. 6 +VSThe positive supply voltage from +3 V to +16.5 V. Total voltage difference between the negative output voltage and the positive input voltage must be less than 24 V. 7

43、VREFThe voltage reference output is 1.25 V, generated by an on-chip bandgap reference. 8 VFBThe output voltage is set by an external resistive divider connected to the voltage feedback input, pin 8. The device will pulse the LXoutput whenever the voltage at this terminal is above ground. FIGURE 1. T

44、erminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92124 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 2. Block diagram. Provided by I

45、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92124 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V,

46、 sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedur

47、es shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in acco

48、rdance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the

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