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本文(DLA SMD-5962-92155 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS REGISTERED 32K X 8-BIT PROM MONOLITHIC SILICON《硅单块 记名的32K X 8比特程序 互补金属氧化物半导体 主储存器微型电路》.pdf)为本站会员(Iclinic170)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92155 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS REGISTERED 32K X 8-BIT PROM MONOLITHIC SILICON《硅单块 记名的32K X 8比特程序 互补金属氧化物半导体 主储存器微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update and part of five year review. tcr 06-08-09 Raymond Monnin REV SHET REV A A SHET 15 16 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DEFENSE SUPPLY

2、 CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeffery D. Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, REGISTERED 32K X 8 - BIT PROM, MONOLITHIC SILICON AND AG

3、ENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-03-19 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-92155 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E548-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAW

4、ING SIZE A 5962-92155 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V).

5、A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92155 01 M X X Federal st

6、ock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked wit

7、h the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: De

8、vice type Generic number 1/ Circuit function Access time 01 CY7C277-50 32K X 8-bit registered PROM 50 ns 02 CY7C277-40 32K X 8-bit registered PROM 40 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Devi

9、ce requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designat

10、ed in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP3-T28 or GDIP4-T28 28 Dual-in-line package Y CQCC1-N32 32 Rectangular leadless chip carrier package Z GDFP2-F28 28 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for

11、device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 and QML-38535. Provided by IHSNot for ResaleNo reproduction or

12、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92155 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range to ground potential (VCC)-0.5 V dc to +7.0 V

13、 dc DC voltage applied to the outputs in the high Z state.-0.5 V dc to +7.0 V dc DC input voltage -3.0 V dc to +7.0 V dc DC program voltage.13.0 V dc Maximum power dissipation.1.0 W 2/ Lead temperature (soldering, 10 seconds).+260C Thermal resistance, junction-to-case (JC)See MIL-STD-1835 Junction t

14、emperature (TJ)+175C Storage temperature range (TSTG) .-65C to +150C Temperature under bias.-55C to +125C Data retention 10 years, minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND) .0 V dc Input high voltage (VIH) .2.

15、0 V dc minimum Input low voltage (VIL) .0.8 V dc maximum Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herei

16、n. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcir

17、cuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/

18、 or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues o

19、f the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena (SEP) induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies

20、 of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade

21、performance and affect reliability. 2/ Must withstand the added PDdue to short circuit test e.g.; IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92155 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218

22、-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Govern

23、ment standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this d

24、rawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q

25、 and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall

26、 be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-385

27、35, appendix A and herein for device class M. 3.2.1 Case outlines. The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.3.1 Unpro

28、grammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2 herein. When required in screening (see 4.2 herein) or qualification conformance inspection groups A, B, C, or D (see 4.4 herein), the devices shall be programm

29、ed by the manufacturer prior to test. A minimum of 50 percent of the total number of cells shall be programmed or at least 25 percent of the total number of cells to any altered item drawing. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an attached alte

30、red item drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92155 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance

31、characteristics. Limits Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroupsDevice type Min Max Unit Output high voltage VOHVCC= 4.5 V, IOH= -2 mA, VIH= 2.0 V, VIL= 0.8 V 1,2,3 All 2.4 V Output low voltage VOLVCC= 4.5 V, IOL= 8 mA, VIH= 2.0 V, VIL= 0.8 V

32、1,2,3 All 0.4 V Input high voltage 1/ VIH1,2,3 All 2.0 V Input low voltage 1/ VIL1,2,3 All 0.8 V Input leakage current IIXVCC= 5.5 V VIN= VCCto GND 1,2,3 All -10 10 A Output leakage current IOZVCC= 5.5 V VOUT= VCCto GND 2/ 1,2,3 All -40 40 A Output short circuit current 3/ 4/ IOSVCC= 5.5 V, VOUT= GN

33、D 1,2,3 All -20 -90 mA Power supply current ICCVCC= 5.5 V, IOUT= 0 mA, VIH= 2.0 V, f = fMAX5/ 1,2,3 All 130 mA Input capacitance 4/ CINVCC= 5.0 V, VIN= 2.0 V, TA= +25C, f = 1 MHz (see 4.4.1c) 4 All 10 pF Output capacitance 4/ COUTVCC= 5.0 V, VIN= 2.0 V, TA= +25C, f = 1 MHz (see 4.4.1c) 4 All 10 pF F

34、unctional tests See 4.4.1d 7, 8A, 8B All Address setup to ALE inactive tALAll 10 ns 01 15 Address hold from ALE inactive tLASee figures 3 and 4 and 6/ 9, 10, 11 02 10 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

35、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-92155 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified G

36、roup A subgroupsDevice type Min Max Unit 01 15 Address pulse width tLL02 10 01 50 Address setup to clock high tSA02 40 Address hold time from clock high tHAAll 0 ESsetup to clock high 3/ tSESAll 15 EShold from clock high 3/ tHESAll 10 01 25 Output valid from clock high 3/ tCO02 20 Clock pulse width

37、tPWCAll 20 01 30 Output low Z from clock high 4/ 7/ tLZC02 20 01 30 Output high Z from clock high 4/ 7/ 9/ tHZC02 20 01 30 Output low Z from E low 4/ 8/ tLZE02 20 01 30 Output high Z from E high 4/ 8/ 9/ tHZESee figures 3 and 4 and 6/ 9, 10, 11 02 20 ns 1/ These are absolute values with respect to d

38、evice ground and all overshoots and undershoots due to system or tester noise are included. 2/ For devices using the synchronous enable, the device must be clocked after applying these voltages to perform this measurement. 3/ For test purposes, not more than one output at a time should be shorted. S

39、hort circuit test duration should not exceed 1 second. VOUT= 0.5 V has been chosen to avoid test problems caused by tester ground degradation. 4/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I.

40、 5/ At f = fmax, address inputs are cycling at the maximum frequency of 1/tSA. 6/ AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the output load on figure 3. 7/ Applies only when the synchronous ESfunctio

41、n is used. 8/ Applies only when the synchronous E function is used. 9/ Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input, CL= 5 pF (including scope and jig). See figure 3. Provided by IHSNot for ResaleNo reprod

42、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92155 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless

43、otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified

44、in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitation

45、s, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535

46、, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes

47、 Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.2 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of

48、 supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

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