DLA SMD-5962-92182 REV C-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS TRIPLE 3-INPUT NAND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make corrections to waveforms. Update boilerplate. - CFS 00-06-12 Monica L. Poelking B Add device type 02. Add vendor CAGE F8859. Add section 1.5, radiation features. Correct tOSHLand tOSLHon waveforms in figure 5. Add table III, delta limits. Up

2、date the boilerplate to include radiation hardness assured requirements. - jak 04-03-30 Thomas M. Hess C Update radiation features in section 1.5. Add SEP test table IB and paragraph 4.4.4.2. jak- 11-04-20 David J. Corbett REV SHEET REV C C C C C SHEET 15 16 17 18 19 REV STATUS REV C C C C C C C C C

3、 C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Riccuiti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica

4、L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, TRIPLE 3-INPUT NAND GATE, TTL COMPATIBLE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-07-23 INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-92182 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E153-11

5、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92182 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assu

6、rance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) level

7、s is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 92182 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA

8、designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (

9、-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACTQ10 Triple 3-input NAND gate, TTL compatible inputs 02 54ACT10 Triple 3-input NAND gate, TTL compatible inputs 1.2.3 Device class desi

10、gnator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, a

11、ppendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack

12、2 CQCC1-N20 20 Square leadless chip carrier X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

13、om IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92182 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc D

14、C output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input clamp current (IIK) (VIN= -0.5 V and VCC+ 0.5 V) 20 mA DC output clamp current (IOK) (VOUT= -0.5 V and VCC+ 0.5 V) 20 mA DC output current (IOUT) per output pin 50 mA DC VCCor GND current (ICC, IGND) per pin 150 mA Storage temperatu

15、re range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW Lead temperature (soldering, 10 seconds): Device type 01 . +300C Device type 02 . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ 3/ Sup

16、ply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT) . +0.0 V dc to VCCMaximum low level input voltage (VIL) +0.8 V Minimum high level input voltage (VIH) . +2.0 V Case operating temperature range (TC) -55C to +125C Input edge rate (V/t

17、) maximum: (from VIN= 0.8 V to 2.0 V, 2.0 V to 0.8 V) 125 mV/ns Maximum high level output current (IOH) -24.0 mA Maximum low level output current (IOL) +24.0 mA 1.5 Radiation features. Device type 02: Maximum total dose available (dose rate = 50 300 rads(Si)/s) 300 krads (Si) Single event phenomenon

18、 (SEP): effective LET, no SEL (see 4.4.4.2) 93 MeV-cm2/mg 4/ effective LET, no SEU (see 4.4.4.2) . 93 MeV-cm2/mg 4/ _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. The m

19、aximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VC

20、Crange and case temperature range of -55C to +125C. 4/ These limits were obtained during technology characterization and qualification, and are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for R

21、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92182 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The

22、 following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, c

23、ited in the solicitation. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTM

24、ENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,

25、Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS cited in the solicitation. U

26、nless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Copies of thes

27、e documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) ASTM INTERNATIONAL (ASTM) ASTM F1192- Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiatio

28、n of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.org/ or from ASTM International, P. O. Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959). (Non-Government standards and other publications are normally available from the organizations that pr

29、epare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing

30、in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in

31、the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as s

32、pecified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92182 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 03.2 Design, construction, and physical di

33、mensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connect

34、ions. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circu

35、it shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.2.7 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control

36、 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in ta

37、ble IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN

38、listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using thi

39、s option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V s

40、hall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order

41、to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Ma

42、ritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of

43、conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notifica

44、tion to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime s age

45、nt, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by

46、this drawing shall be in microcircuit group number 36 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92182 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SH

47、EET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Device type and 4/ device VCCGroup A subgroups Limits 5/ Unit class Min Max High level output volt

48、age 3006 VOH1 For all inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -50 A All All 4.5 V 1, 2, 3 4.40 V VOH2 All All 5.5 V 1, 2, 3 5.40 VOH3 For all inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -24 mA All All 4.5 V 1 3.86 2, 3 3.70 VOH4 All All 5.5 V 1 4.86 2, 3 4.70 VOH5 6/ For all inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V For all other inputs VIN= VCCor GND IOH= -50 mA All All 5.5 V 1, 2, 3 3.85 Low level output voltage 3