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本文(DLA SMD-5962-92201 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS NINE-BIT PARITY GENERATOR CHECKER MONOLITHIC SILICON.pdf)为本站会员(amazingpat195)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92201 REV B-2010 MICROCIRCUIT DIGITAL ADVANCED CMOS NINE-BIT PARITY GENERATOR CHECKER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct IOLfor VCC= 3.0 V dc and 3.6 V dc in section 1.4. Add vendor CAGE F8859. Add case outline X. Add device type 02. Add table III, delta limits. Update the boilerplate to remove classes B and S criteria and to reflect the changes in accordan

2、ce with MIL-PRF-38535 requirements. Editorial changes throughout - jak 03-04-17 Thomas M. Hess B Update boilerplate to current requirements of MIL-PRF-38535. - jak 10-04-01 Thomas M. Hess REV SHEET REV B B B B SHEET 15 16 16 17 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7

3、 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Ricciuti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED

4、 BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, NINE-BIT PARITY GENERATOR/CHECKER, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-06-03 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-92201 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E230-10 Provided by IHSNot for ResaleNo reproduction

5、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of hig

6、h reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN.

7、The PIN is as shown in the following example: 5962 - 92201 01 Q C A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V R

8、HA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2

9、 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC280 9-bit parity generator/checker 02 54AC280 9-bit parity generator/checker 1.2.3 Device class designator. The device class designator is a single letter identifying the

10、product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4

11、 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line package D GDFP1-F14 or CDFP2-F14 14 Flat pack X CDFP3-F14 14 Flat pack 2 CQCC1-N20 20 Square leadless chip ca

12、rrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92201 DEFE

13、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +6.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5

14、V dc DC Input diode current (IIK) (VIN= -0.5 V and VCC+ 0.5 V) 20 mA DC Input diode current (IOK) (VOUT= -0.5 V and VCC+ 0.5 V) 20 mA DC output current (IOUT) (per output pin) 50 mA DC VCCor GND current (ICC, IGND) (per pin) 100 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissi

15、pation (PD) . 500 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Case operating temperature range (TC) -55C to +125C 1.4 Recommended operating conditions. 2/ 3/ 4/ Supply voltage range (VCC) +3.0 V dc to

16、+5.5 V dc Input voltage range (VIN) +0.0 V dc to VCC Output voltage range (VOUT) . +0.0 V dc to VCCMaximum Low level input voltage (VIL): VCC= 3.0 V dc 0.90 V dc VCC= 4.5 V dc 1.35 V dc VCC= 5.5 V dc 1.65 V dc Minimum High level input voltage (VIH): VCC= 3.0 V dc 2.10 V dc VCC= 4.5 V dc 3.15 V dc VC

17、C= 5.5 V dc 3.85 V dc Case operating temperature range (TC) -55C to +125C Input edge rate (V/t) maximum (VINfrom 30% to 70% of VCC) 125 mV/ns Maximum low level output current (IOL): VCC= 3.0 V dc and 3.6 V dc . +12 mA VCC= 4.5 V dc and 5.5 V dc . +24 mA Maximum high level output current (IOH): VCC=

18、3.0 V dc and 3.6 V dc . -12 mA VCC= 4.5 V dc and 5.5 V dc . -24 mA 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for all

19、owable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C.

20、 4/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back up systems. Data retention implies no input transitions and no stored data loss with the following conditions: VIH 70 percent of VCC, VIL 30 percent of VCC, VOH 70 percent of VCCat 20 A, VOL 30

21、 percent of VCCat 20 A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.

22、1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specif

23、ications and Standards (DoDISS) and supplement thereto, cited in the solicitation. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Inter

24、face Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardizati

25、on Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of t

26、he DoDISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DoDISS are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) EIA/JEDEC Standard No. 78 - IC Latch-Up Test JEDEC Standard No. 20 - Standard for Descript

27、ion of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington VA 22201-3834.) (Non-Government standards and other publications are normally available from the organizations th

28、at prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Not

29、hing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modifie

30、d in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and

31、 as specified herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2 Design, construction, an

32、d physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Ter

33、minal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test

34、circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full cas

35、e operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the man

36、ufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for devi

37、ce classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance

38、mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). Fo

39、r device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall aff

40、irm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in M

41、IL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to th

42、is drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shal

43、l be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 39 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permit

44、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92201 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C

45、 TC +125C +3.0 V VCC +5.5 V Device type 3/ and VCCGroup A subgroups Limits 4/ Unitunless otherwise specified device class Min Max Positive input clamp voltage 3022 VIC+For input under test, IIN= 1.0 mA All Q, V 0.0 V 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -1.0 m

46、A All Q, V Open 1 -0.4 -1.5 V High level output voltage 3006 VOH1For all inputs affecting output under test, VIN= VIHor VIL VIH= 2.10 V VIL= 0.90 V For all other inputs, VIN= VCCor GND IOH= -50 A All All 3.0 V 1, 2, 3 2.90 V VOH2For all inputs affecting output under test, VIN= VIHor VIL VIH= 3.15 V

47、VIL= 1.35 V For all other inputs, VIN= VCCor GND IOH= -50 A All All 4.5 V 4.40 VOH3 For all inputs affecting output under test, VIN= VIHor VIL VIH= 3.85 V VIL= 1.65 V For all other inputs, VIN= VCCor GND IOH= -50 A All All 5.5 V 5.40 VOH4For all inputs affecting output under test, VIN= VIHor VIL VIH

48、= 2.10 V VIL= 0.90 V For all other inputs, VIN= VCCor GND IOH= -4.0 mA All All 3.0 V 2.40 VOH5 For all inputs affecting output under test, VIN= VIHor VIL VIH= 3.15 V VIL= 1.35 V For all other inputs, VIN= VCCor GND IOH= -24 mA All All 4.5 V 3.70 VOH6 For all inputs affecting output under test, VIN= VIHor VIL VIH= 3.85 V VIL= 1.65 V For all other inputs, VIN= VCCor GND IOH= -24 mA All All 5.5 V 1, 2, 3 4.70 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

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