DLA SMD-5962-92230 REV A-1996 MICROCIRCUIT DIGITAL FAST CMOS 8 BIT BUS INTERFACE D REGISTERS WITH CLOCK ENABLE ASYNCHRONOUS CLEAR THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS AND LIMI.pdf

1、SMD-5762-92230 REV A m 9999996 0089427 7T5 m DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER, COLUMBUS 3990 EAST BROAD STREET COLUMBUS, OH 43216-5000 IN REPLY REFER TO DSCC-VAC (Mr . MiesseI(6 14) 692-0543 (DSN 850) SEP 26 l9B SUBJECT: Notice of Revision (NOR) 5962-R207-96 for Standard Microcircuit D

2、rawing (SMD) 5962-92230 Military/Industry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR shou

3、ld be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active current

4、certificate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. If you have comments or questions, please contact Mr. Bernard Miesse at (614) 692-05

5、43 (DSN 850). 1 Encl y MONICA L. POELKING Microelectronics Team Chief, Custom Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-72230 REV A U %99999b 0089430 417 = I ubireporting burden forthis cdlectim is estimated to average 2 hairs per resp

6、aise including the me for reviewing insbudions searching esting daia soums athefin aml mainiaini3,the dala needed and completing and reviewing lhe cdieciich di Send uxnments regardin this burden estimate or any olhei sped o!this cdlecon , inMon, indidin su estions fo! Yuang this burden, to Dsi of De

7、fense. Washington deadquarters Services, Directorate )r Information Operations and Re Orts. 1218 JeKrson Davis Hi hway. Suite 1204, Arlinglwi, VA 222024302, and to lhe Of of Management and Budget. a em add olAol. Revisions description column; add Changes in accordance with NOR 5962-R207-96“. Revisio

8、ns date column; add ii96-09-0610. Revision level block; add nlA1l. Rev status of sheets; for sheets 1 and 8, add iiAii. Table I, low level ground bounce noise, VoLp, change maximum limit from 1i1450i to 11190011. Table I, Low level ground bounce noise, VOLVI change maximun limit from li-llOO1i to 11

9、-190011. Table I, high Level Vcc bounce noise, VOHp, change maximm Limit from ii6OOii to %OOil. Table I, high Level Vcc bounce noise, VOHV, change maximm Limit from i1-55O1i to ii-60011. Revision level black; add I1Aii. e. SIGNATURE Monica L. Poelking b. REVISION COMPLETED (Signature) Bernard J. Mie

10、sse 14. THIS SECTION FOR GOVERNMENT USE ONLY (1) Existing document supplemented by the NOR may be used in manufacture. (2) Revised document must be received before manufacturer may incorporate this change. (3) Custodian of master document shall make above revision and furnish revised document. f. DA

11、TE SIGNED (YYMMDD) 96-09-06 c. DATE SIGNED (YYMMDD) 96-09-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-LTR DESCRIPTION REY STATUS REV OF SHEETS 123 SEET DATE (YR-MO-DA) APPROVED PREPARED BY PMIC NIA Phu H. Nguycn CHECKED BY MILITARY DRAWING Tho

12、rns J. Ricciuti THIS DRAUING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE By Joe A. Dupay AMSC N/A DRAWINC APPROVAL DATE 93-06-24 REVISION LEVEL DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, FAST CMOS, 8 BIT, BUS INTERFACE, D REGISTE

13、RS WITH CLOCK ENABLE, ASYNCHRONOUS COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING, MONOLITHIC SILICON CLEAR, THREE-STATE OUTPUTS, TTL SIZE ICAGE CODE A 67268 5962-92230 SHEET 1 OF 21 bESC FOAM 193 JUL 91 DISTRIBUTIOH STATEHENT A. Approved for public release; distribution is unliiaitecl. 5962-E22

14、9-93 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I 1. SCOPE 1.1 Scope. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). Two product assurance classes.consisting of military high reliability (device

15、classes 8, Q, and MI and space application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of NIL-STO-883,

16、“Provisions for the use of NIL-STD-883 in conjunction with compliant non-JAN devices“. available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. When 1.2 m. The PIN shall be as shoun in the following example: 5962 - 92230 - o1 X I I I t I I - K - H - I i i i i i I Le

17、ad Case I Device I Device I RHA I Federal stock class designator type class outline finish designator (See 1.2.1) (See 1.2.2) designator (See 1.2.4) (See 1.2.5) / (See 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes H, B, and S RHA marked devices shall meet the MIL-H-38510 specified RHA

18、 levels and shall be marked with the appropriate RHA designator. the HIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. non-RHA device. Device classes 61 and V RHA marked devices shall meet A dash (-) indicates a 1.2.2 Device typeW. The device type($) shall ide

19、ntify the circuit function as follows: Device type Generic number Circuit function DI, o2 54FCT825AT Fast CMOS, 8-bit, bus interface D registers with clock enable, asynchronous clear, three-state outputs, TTL compatible inputs and limited output voltage swing. Fast CMOS, I-bit, bus interface O regis

20、ters with clock enable, asynchronous clear, three-state outputs, TTL compatible inputs and limited output voltage suing. Fast CMOS, 8-bit, bus interface D registers with clock enable, asynchronous clear, thrct-state outputs, TTL compatible inputs and limited output voltage swing. 03, O4 54FCT825BT 0

21、5, o6 54FCT825CT 1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with

22、 1.2.1 of MIL-STD-883 0 or S Q or V Certification and qualification to MIL-M-38510 Certification and qualification to HIL-1-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: gutline lotter Descriptivo desianator Torminmls Packaae stylo K L 3 GDF

23、P2-F24 or CDFP3-F24 24 f Lat package GDIP3-T24 or CDIP4-T24 24 dua 1-i n- line CQCCI 428 28 leadless-chip-carrier package 1.2.5 Lead finish. The lead finish shall be as specified in MIL-M-38510 for classes M, 8, and S or MIL-1-38535 for classes Q and V. Finish letter “X“ shall not be mrked on the mi

24、crocircuit or its packaging. for use in specifications when lead finishes A, E, and C are considered acceptable and interchangeable without preference. The “X“ designation is STANDARDIZED SIZE 5962-92230 MLITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 2 DE

25、SC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-57b2-72230 = 779337b OOq5739 025 1.3 Absolute maximum ratings. i/ 2/ 3/ Supply voltage range (V 1 -.- - - - - - - - - - - - - - - - DC input voltage range FS N) - - - - - - - - -

26、 - - - - - - - DC output voltage range do T) - - - - - - - - - - - - - - - DC input clamp current (I Ky (V = -0.5 VI - - - - - - - - - DC output clamp current (f = -0.5 V and +7.0 V) - - DC output source current (?;,I per output - - - - - - - - - DC output sink current (IoL per output - - - - - - -

27、- - - DC ground currentCfIGKDI - - - - - - - - - - - - - - - - - - Storage temperature range (T - - - - - - - - - - - - - - Case temperature under bias Maximum power dissipation (PD) - - - - - - - - - - - - - - - Lead temperature (soldering, 10 seconds) - - - - - - - - - - Thermal resistance, juncti

28、on-to-case (0 ) - - - - - - - - - Junction temperature (TJ) - - - - - - - - - - - - - - - - - 1.4 Recommended operatinq conditions. z/ I/ Supply voltage range (V 1 - - - - - - - - - - - - - - - - - Input voltage range (V N - - - - - - - - - - - - - - - - - Output voltage range tb,) - - - - - - - - -

29、 - - - - - - - - Maximum low level input voltage (V - - - - - - - - - - - Minimum high level input voltage tb - - - - - - - - - - - Case operating temperature range - - - - - - - - - - - Haximum input rise and fall rate (t , t 1: (from VIN = 0.3 V to 2.7 V, 2.7 Vto 6.3 V) - - - - - - - Maximum high

30、level output current (IOH): Device types 01, 03, and O5 - - - - - - - - - - - - - - - Device types 02, 04, and 06 - - - - - - - - - - - - - - - Maximun low level output current (IoL) - - - - - - - - - - - 1.5 Digital losic testinq for device classes P and V. Fault coverage measurement of manufacturi

31、ng ) dou, DC Vcc current (I ) - - - - - - - - - - - - - - - - - - - - JC logic tests k!;p?Hfd the %put under test. Each device manufacturer shall test product on the fixtures they currently use. device manufacturer shall inform DESC-EC of this change and test the 5 devices on both the new and old te

32、st fixtures. include, all measured peak values for each device tested and detailed osc.illoscope plots for each VOL , VOHp, and V The plot shall contain the waveforms of both a swifching output and ?#i output under test.“ a#ect capacitance. C and C MHz. For CIN and COUT:test a?YTapplicable pins on f

33、ive devices with zero failures. d. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patter

34、ns per function shall be guaranteed, if not tested, to the truth table in figure 2, herein. For device classes B and S, subgroups 7 and 8 tests shalt be sufficient to verify the truth table as approved by the qualifying activity. shall include verifying the functionality of the device; these tests s

35、hall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). bounce-tests are required for all device classes. These tests shall be performed only for V , VoLv, VOHp, and V shall be measured for the worst case outputs of the lest 5 devices assembled in the worst The

36、 5 devices to be tested shall be the worst case device type I All other package types shall be guaranteed, if not tested to All other device types shall be guaranteed, if not tested, to the limits established The device manufacturer will submit to DESC-EC data that shall include, all measured peak v

37、alues and V from one sample part When a new fixture is used, the The device manufacturer shall then submit to DESC-EC data from testing on both fixtures, that shall voLv from one sample part per function. c. C and COUT.shall be measured only for initial qualification and after pi-ocess or design cha

38、nges which nay shall be measured between the designated terminal and GND at a frequency of 1 I For device classes Q and V, subgroups 7 and 8 4.4.2 Group B inspection. The group B inspection end-point electrical parameters shall be as specified in table II Class S steady-state life (accelerated) shal

39、l be conducted using test condition D of method 1005 of MIL-STD- herein. 883. qualifying activity. For device class S steady-state life tests, the test circuit shall be submitted to and approved by the 4.4.3 Group C inspection. The group C inspection end-point electrical parameters shalt be as speci

40、fied in table 11 herein. I 4.4.3.1 Additional criteria for device classes M and 8. Steady-state life test conditions, method 1005 of MIL-STD-883: I a. Test condition A, 8, C or D. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and s

41、hall be made available to the preparing or acquiring activity upon request. For device class E, the test circuit shall be submitted to the qualifying actlvity. For device classes M and E, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance

42、with the intent specified in test method 1015. b. TA = +125“C, minimum. c. Test duration: 1,OOO hours, except as permitted by method 1005 of MIL-STD-883. 4.4.3.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alte

43、rnatives shall be as specified in the device manufacturers M plan in accordance with MIL-1-38535. The burn-in test circuit shall be maintained under document revision Level control of the device manufacturers TRB in accordance with MIL-1-38535 and shall be made available to the preparing or acquirin

44、g activity upon request. The test circuit shall specify the inputs, outputs, biases, and per dissipation, as applicable, in accordance with the intent specified in test method 1015. STANDARDIZED SIZE 5962-92230 MILITARY DRAWING h DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL DE

45、SC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-4.4.4 Group D inspection. 4.4.5 Group E inspection. Group D inspection shall be in accordance with table IV of method 5005 of MIL-STD-883. Group E inspection is required only for par

46、ts intended to be marked as radiation End-point electrical parameters shall be as specified in table II herein. hardness assured (see 3.5 herein). RHA levels for device classes E, S, Q, and V shall be M, O, R, and H and for device class M shall b M and D. a. b. For device classes M, E, and S, the de

47、vices shall be subjected to radiation hardness assured tests as End-point electrical parameters shall be as specified in table JI herein. specified in MIL-M-38510 for the RHA level being tested. vehicle shall-be subjected to radiation hardness assured tests as specified in MIL-M-38535 for the RHA le

48、vel being tested. specified in table I at TA +2SoC, after exposure, to the subgroups specified in table II herein. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. For device classes Q and V, the devices or test All device classes must meet the post

49、irradiation end-point electrical parameter limits as c. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND I terminal. I Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaqinq reauirements. The requirements for packaging shall be in accordance with MIL-M