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本文(DLA SMD-5962-92319 REV A-2004 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL EXCLUSIVE-OR GATE MONOLITHIC SILICON《硅单片 异或门 低功率肖脱基TTL 双极数字微型电路》.pdf)为本站会员(bowdiet140)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-92319 REV A-2004 MICROCIRCUIT DIGITAL BIPOLAR LOW POWER SCHOTTKY TTL EXCLUSIVE-OR GATE MONOLITHIC SILICON《硅单片 异或门 低功率肖脱基TTL 双极数字微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 04-11-10 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV A A A A A A A A A A OF SHEETS SHEE

2、T 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGIT

3、AL, BIPOLAR, LOW POWER SCHOTTKY TTL, EXCLUSIVE-OR AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-03-01 GATE, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-92319 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E428-04 Provided by IHSNot for ResaleNo reproductio

4、n or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of h

5、igh reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN

6、. The PIN is as shown in the following example: 5962 - 92319 01 M C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V R

7、HA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2

8、 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 54LS136 Quadruple 2-input exclusive-OR gate with open collector outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assur

9、ance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline

10、s. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 dual-in-line D GDFP1-F14 or CDFP2-F14 14 flat 2 CQCC1-N20 20 square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-

11、PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LE

12、VEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range . -1.5 V dc at 18 mA to +7.0 V dc Storage temperature range -65C to +150C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction tempe

13、rature (TJ) +175C Lead temperature (soldering, 10 seconds) +300C Maximum power dissipation (PD) . 55.0 mW 2/ 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) 0

14、.7 V dc Maximum high level output voltage (VOH) . 5.5 V dc Maximum input clamp current (IIK) -18 mA Maximum low level output current (IOL) 4.0 mA Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specif

15、ication, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Spe

16、cification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings

17、. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the tex

18、t of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the

19、 device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and must withstand the added PDdue to short-circuit test e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

20、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-

21、PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, a

22、ppendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device cl

23、ass M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test c

24、ircuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table I and shal

25、l apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 her

26、ein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be

27、 marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-P

28、RF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawi

29、ng (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply f

30、or this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for de

31、vice classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involv

32、ing devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. O

33、ffshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 08 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reprodu

34、ction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C +4.

35、5 V VCC +5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Low level output voltage VOLVCC= 4.5 V, VIL= 0.7 V, 1, 2, 3 All 0.4 V VIH= 2.0 V, IOL= 4 mA Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.5 V High level output current IOHVCC= 4.5 V, VIL= 0.7

36、V, 1, 2, 3 All 100 A VIH= 2.0 V, VOH= 5.5 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 All 40 A IIH2VCC= 5.5 V, VIN= 7.0 V 200 Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2, 3 All -0.8 mA Supply current 1/ ICCVCC= 5.5 1, 2, 3 All 10 mA Functional tests VCC= 4.5 V, 5.5 V, Se

37、e 4.4.1b 7, 8 All Propagation delay time, tPLHCL= 15 pF, 9 All 30 ns A or B to Y RL= 2 k, 10, 11 42 tPHLSee figure 3 9 30 10, 11 42 1/ ICCis measured with one input of each gate at 4.5 V, the other inputs grounded and the outputs open. Provided by IHSNot for ResaleNo reproduction or networking permi

38、tted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines C and D 2 Terminal number Terminal symbol 1 1A NC 2 1B 1A 3 1Y 1B 4 2A 1Y 5 2B NC 6 2

39、Y 2A 7 GND NC 8 3Y 2B 9 3A 2Y 10 3B GND 11 4Y NC 12 4A 3Y 13 4B 3A 14 VCC3B 15 - - - NC 16 - - - 4Y 17 - - - NC 18 - - - 4A 19 - - - 4B 20 - - - VCCNC = No connection FIGURE 1. Terminal connections. Inputs Outputs A B C L L L L H H H L H H L H = High level voltage L = Low level voltage FIGURE 2. Tru

40、th table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduc

41、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Notes: 1. RL= Load resistor; see Table I for value. 2. CL= Load capacitance includes jig a

42、nd probe capacitance; see table I for value. 3. All input pulses have the following characteristics: PRR 1 MHz, ZOUT= 50, tr 15 ns, tf 6 ns. 4. The outputs are measured one at a time with one input transition per measurement. FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for Res

43、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92319 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sam

44、pling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures s

45、hall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordan

46、ce with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer und

47、er document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b. Int

48、erim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to t

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