DLA SMD-5962-93019-1996 MICROCIRCUIT DIGITAL FAST CMOS OCTAL BUFFER LINE DRIVER WITH CURRENT LIMITING RESISTORS AND THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOL.pdf

1、SflD-5962-9301q 99999616 0084449 T37 U LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV STATUS OF SHEETS SHEET PREPARED BY JosephA Kerby I PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA CHECKED BY Thanh V Ngu

2、yen APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 96-01 -05 REVISION LEVEL DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, FAST CMOS, OCTAL BUFFER/LINE DRIVER WITH CURRENT LIMITING COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING, MONOLITHIC SILICON RESISTORS AND TH

3、REE-STATE OUTPUTS, TTL I 5962-93019 SIZE 1 CAi;c2sEs A SHEET 1 OF 18 )ESC FORM 193 JUL 94 DISTRIBUTION STATEMENT A Approved for public release, distribution IC unlimited 5962-E223-95 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SMPE 1.1 m. This

4、 drawing forms a part of a one part - one part nuiiber documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes O and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are r

5、eflected in the Part or Identifying Nunber (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accorciance with 1.2.1 of MIL-STD-883, isProvisions for the use of MIL-STD-883 in conjunction with canpliant non-JAN devicesnn. hen available, a choice of Radiation Hardncss Assu

6、rance (RHA) levels are reflected in the PIN. STAN DARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 Federal RHA Device Device Case Lead stock class designator type c 1 ass outline finish designator (see 1.2.1) (see 1.2.2) desi gnator (see 1.2.4) (see 1.2.5) LA (see 1.2.3

7、) / Drawing nuber SIZE A 5962-9301 9 REVISION LEVEL SHEET 2 1.2.1 . Device class M RHA marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA desi

8、gnator. non-RHA device. Device classes P and V RHA marked devices shall meet the A dash (-) indicates a 1.2.2 Device tem . The device type(s) shall identify the circuit function as follows: Device tm .- ircuit functm o1 54FCT2244T Octal buffer/line driver with current limiting resistors and three-st

9、ate outputs, TTL compatible inputs and limited outpit voltage swing. 02 54FCl2244AT Octal buffer/line driver with current limiting resistors and three-state outputs, TTL coirpatible inputs and limited output voltage swing. 03 54FCT2244CT Octal buffer/line driver with current limiting resistors and t

10、hree-state outputs, TTL compatible inputs and limited output voltage swing. 1.2.3 Device class des- . lhe device class designator shall be a single letter identifying the product assurance Level as follows: Device class M Vendor self-certification to the requirements for non-JAN class B microcircuit

11、s in accordance with 1.2.1 of MIL-STD-883 Certification and qualification to MIL-1-38535 P or V 1.2.4 bse outlinefQ . The case outline(s1 shall be as designated in MIL-STD-1835, and as follows: Putline letter Descri Dt ive desianator Jerminah Packaae sty and the absolute value of the magnitude, not

12、the sign, is relative to the minimum and maximm limits, as applicable, listed herein. limits specified in table I at 4.5 V i Vcc i 5.5 V. tests, the output terminals shall be open. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to A

13、ll devices shall meet or exceed the 4/ This parameter is guaranteed, if not tested, to the limits specified in table I. 9 Three-state output conditions are required. 4/ This test may be performed using VIH = 3.0 Y. U This test is required only for group A testing; see 4.4.1 herein. When VIH = 3.0 V

14、is used, the test is guaranteed for VIH = 2.0 V. H/ Not more than one output should be shorted at a time. lhe duration of the short circuit test should not exceed one second. STANDARD MICROCIRCUIT DRAWING r- DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 I DESC FORM 193A 5962-9301 9 REVISION LEVE

15、L SHEET JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-S%b2-93OL m b 0084458 T4T D SIZE A STAN DARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 - continued. TABLE I. peristics e/ IccD may be verified by the foll

16、owing equation: I 5962-93019 REVISION LEVEL SHEET 10 CCT ICC - DNAI fcp/2 +fiNi Jcu) = I where ICCT, I device under fest, den tesfed as described in ta tki alternate test method, the maxinun Limit is equal to the nimber of inputs at a high TTL input level times 2.0 II&; and the preferred method and

17、limits are guaranteed. (Icc or IC in table I), and AI shall be the measured values of these parameters, for the in table I, herein. 1pI This test may be performed either one input at a time (preferred method) or with all input pins similtaneously at - 2.1 V (alternate method). Classes Q and V shall

18、use the preferred method. when the test is performed I w lCCT is calculateci as folowc: DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device types Case outlines Terminal nunber 1 2 3 4 5 6 7 8 9 10 II 12 13 14 15 16 17 18 19 2

19、0 JUL 94 01, 02, and 03 R, S, end 2 Terminal symbol OE1 1Al 2Y 4 IA2 2Y3 1 A3 2Y2 1 A4 2Yl GND 2A 1 1Y4 2A2 1 Y3 U3 1Y2 2A4 1Y1 OE2 - - “cc Pin descriptions Terminal symbol I Description mAn (m = 1 to 2, n = 1 to 4) Data inputs OEm (m = 1 to 2) Output enable control input , mn (m = 1 to 2, n = 1 to

20、4) - Outputs (noninverting) STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE A 5962-9301 9 REVISION LEVEL SHEET 11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- OE 1 SMD-5462-930L9 4999996 0084460 bT8 W Al 1A

21、2 1A3 1 A4 - OE2 2A4 2A3 2A2 2A 1 K- 1Y1 1Y2 1Y3 7 2Y4 2Y3 2Y2 2Y1 1Y4 FIGURE 3. 404 ic diasrarn. STAN DA RD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 5962-9301 9 REVISION LEVEL SHEET I I I DESC FORM 193A Provided by IHSNot for ResaleNo reproduction or networking permitt

22、ed without license from IHS-,-,-SWITCHING INPUT STAN DARD 14 IC ROC I R C U IT DRAW I N G DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 IN-PHASE INPUTS 3.0V INPUT SKEW 1.5V SIZE A 5962-9301 9 REVISION LEVEL SHEET 13 OUT-OF-PHASE INPUTS 3.0V 1.5V 0.ov 1.5V U o ov OUTPUT QUIET ai: V OH UNDER TEST

23、_ IOTES: RL OUTPUT 1 RL DUT (n OUTPUTS) OUTPUT n 1. C tke test jig and prote. 2. RL =-450n i1 percent, chip resistor in series with a 50n termination. termination shall be the 50n characteristic impedance of the coaxial connector to the oscilloscope. 3. Input signal to the device under test: a. b. i

24、ncludes a 47 pF chip capacitor (-O percent, +20 percent) and at least 3 pF of equivalent capacitance from For monitored outputs, the 50n VIN = 0.0 V to 3.0 V; duty cycle = 50 percent; fIN 2.1 MHz. tr, tf 3.17s t1.0 ns. 3.0 ns limit may be increased up to 10 ns, as needed, maintaining the +1.0 ns tol

25、erance and guaranteeing the results at 3.0 ns 11-13 ns; skew between any two switching inputs signals (tsk): c 250 ps. For input signal generators incapable of maintaining these values of tr and tf, the waveforms. FIGURE 4. Ground bounce load circuit and Provided by IHSNot for ResaleNo reproduction

26、or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE A 5962-9301 9 REVISION LEVEL SHEET 14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Q and y. 4.2.2 Addition

27、al criteria for device classes a. lhe burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers PM plan in accordance uith MIL-1-38535. maintained under docunent revision level control of the device manufacturers Technology

28、 Review Board (TRB) in accordance uith MIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. lhe test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. lhe kirn-

29、in test circuit shall be b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of MIL-1-38535. . . 4.3 Qualification mction for device classes

30、Q and y . Qualification inspection for device classes 0 and V shall Inspections to be performed shall be those specified in MIL-1-38535 and herein for be in accordance with MIL-1-38535. groups A, B, C, 0, and E inspections (see 4.4.1 through 4.4.4). _ . . 4.3.1 -discherae sensitivitv wlification upa

31、ection . Electrostatic discharge sensitivity (ESDS) testing shall be performed in accordance uith MIL-STD-883, method 3015. initial qualification and after process or design changes uhich may affect ESDS classification. ESDS testing shall be measured only for 4.4 Conformance inspection . Quality con

32、formance inspection for device class M shall be in accordance with YIL-STD-883 (see 3.1 herein) and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, E, C, D, and E inspections (see 4.4.1 through 4.4.4)

33、. Technology conformance inspection for classes Q and V shall be in accordance uith MIL-1-38535 including groups A, B, I, D, and E inspections and as specified herein except uhere option 2 of MIL-1-38535 permits alternate in-line control test i ng . 4.4.1 -UD A wctia. a. lests shall be as specified

34、in table II herein. bm hect capacitance. CI, and Cw shall be measured betueen the designated terminal and GND at a frequency of and C,-,l.shall be measured only for initial qualification and after process or design changes uhich may 1 MHz. For CIN and COUT, test all applicable pins on five devices u

35、ith zero failures. S,“alylka?&h of function types, that by design, will yield the same capacitance values uhen tested in accordance uith table I, herein. lhe device manufacturer shall set a function group limit for the CIN and CwT-tests. conditions specified herein. All other device functions in tha

36、t particular functional group shall be guaranteed, if not tested, to the limits and test conditions specified in table I, herein. manufacturer shall submit to DESC-EC the device functions listed in each functional group and the test results for each device tested. , a device manufacturer may qualify

37、 devices by functional groups. A specific functional group The device manufacturer may then test one device from a functional group, to the limits and The device c. Ground and V bounce tests are required for all device classes. These tests shall be performed only for initial qual%ication, after proc

38、ess or design changes uhich may affect the performance of the device, and any changes to the test fixture. V device. outputs. the uorst case package type supplied to this docunent. tested, to the limits established for the uorst case package. determined by the manufacturer. measured peak values for

39、each device tested and detailed oscilloscope plots for each VoLp,.Vo “, VOHp, and V HV from one sample part per function. tF1e output under test. Each device manufacturer shaLL test product on the fixtures they currently use. When a new fixture is used, the device manufacturer shall inforin DESC-EC

40、of this change and test the 5 devices on both the new and old test fixtures. The device manufacturer shall then submit to DESC-EC data from testing on both fixtures that shall include all measured peak values for each device tested and detailed oscilloscope plots for each VoLp, VoLv, VOHP, and VOHV

41、from one sample part per function. switching output and the output under test. VoLv, VOHp, and VOHV shall be measured for the uorst case outputs of the All other outputs shalpLL guaranteed, if not tested, to the limits established for the uorst case All other package types shall be guaranteed, if no

42、t lhe device manufacturer will submit to DESC-EC data that shall include all The uorst case outputs tested are to be determined by the manufacturer. Test 5 devices assembled in The package type to be tested shall be The plot shall contain the waveforms of both a switcking output and The plot shall c

43、ontain the waveforms of both a 1 5962-93019 STANDARD MICROCIRCUIT DRAWING REVISION LEVEL SHEET DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 I I 1 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Test requirements Interim ele

44、ctrical parameters (see 4.2) Subgroups Subgroups (in accordance with MI L - STD-883, TM 5005. table I) (in accordance with MI L - I -38535, t ab1 e I I i ) Devi ce Devi ce Device class M class Q class V I- Final electrical parameters (see 4.2) - 1/ 1, 2, 3, 4, 1/ 2l 3# 4# z/ l, 28 3l 41 5, 6, 7, 8,

45、9, 5, 6, 7, 8, 51 61 71 a, Group A test requirements (see 4.4) 1. 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 1, 2, 3, 4, 5, 6,7,8,9,10, 6,7,8,9, 11 I IO. 11 Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) 1, 2, 3, 4, 5, 6 1, 2, 3, 4, 1, 2, 3, 4,

46、 5, 5, 6 6, 7, 8, 9, 10. 11 1, 2. 3 1, 2, 3 1, 2, 3 Group E end-point electrical parameters (see 4.4) STANDARD h!lCROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON. OHIO 45444 1, 4, 7, 9 I 1, 4, 7, 9 1 1, 4, 7, 9 SIZE 5962-9301 9 A REVISION LEVEL SHEET 1/ PDA applies to subgroups 1 and 4 (i.e

47、., IccT only). a PDA applies to subgroups 1, 4, and 7. I 16 I l DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SflD-5962-93019 U 9h 00844b5 3r8T . 4.4.2.2 hQditionaL criteria for device classes Q and I . The steady-state life

48、test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers Pn plan in accordance with MIL-1-38535. manufacturers TRB, in accordance with MIL-1-38535, and shall be made available to the acquiring or preparing activity upon request. T

49、he test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005. herein. The test circuit shall be maintained under docunent revision level control by the device 4.4.3 mom D . . The grot D inspection end-point electrical paremeters shall be as specified in table II 4.4.4 ErprI, E