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本文(DLA SMD-5962-93098 REV A-2010 MICROCIRCUIT DIGITAL ECL 8-BIT SYNCHRONOUS BINARY UP COUNTER MONOLITHIC SILICON.pdf)为本站会员(confusegate185)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-93098 REV A-2010 MICROCIRCUIT DIGITAL ECL 8-BIT SYNCHRONOUS BINARY UP COUNTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirments. Editorial changes throughout. - gap 10-03-23 Charles F. Saffle REV SHET REV A SHET 15 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V.

2、 Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ECL, 8

3、-BIT SYNCHRONOUS BINARY UP COUNTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-06-17 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-93098 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E512-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDAR

4、D MICROCIRCUIT DRAWING SIZE A 5962-93098 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application

5、 (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93098 0

6、1 M Y X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels a

7、nd are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit functi

8、on as follows: Device type Generic number Circuit function 01 10E416 8-bit synchronous binary up counter 02 100E416 8-bit synchronous binary up counter, temperature compensated 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as fo

9、llows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case ou

10、tline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Y See figure 1 28 Quad flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Pr

11、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93098 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage rang

12、e (VEE) 2/ . -8.0 V dc to 0.0 V dc Input voltage range (VIN) 2/ -6.0 V dc to 0.0 V dc Minimum input swing (VPP) 0.150 V dc Output current (IOUT): Continuous . 50 mA Surge . 100 mA Storage temperature range . -65C to +165C Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +165C

13、 Maximum power dissipation (PD): Device type 01 . 988 mW Device type 02 . 1135 mW Thermal resistance, junction-to-case (JC) 1.23C/W 1.4 Recommended operating conditions. Supply voltage range (VEE): 2/ Device type 01 . -5.46 V dc to -4.94 V dc Device type 02 . -5.46 V dc to -4.20 V dc Input voltage r

14、ange (VIN): 2/ Device type 01 . -1.950 V dc to -0.660 V dc Device type 02 . -1.810 V dc to -0.880 V dc Output voltage range (VOUT): 2/ Device type 01 . -1.972 V dc to -0.672 V dc Device type 02 . -1.810 V dc to -0.880 V dc Input rise and fall times, 20% to 80% (tr, tf) . 500 ps maximum Case operatin

15、g temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those

16、 cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Out

17、lines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue,

18、 Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Ratings apply when referenced to VCC= 0.0 V dc. Provided by IHSNot for Res

19、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93098 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this

20、 drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes

21、 Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M sha

22、ll be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-3

23、8535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.

24、2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 5. 3.2.6 Inner-layer dielectric. Polyimide and silicon coatings are allowed as part of the wafer fabrication pr

25、ocess provided that each microcircuit inspection lot (see MIL-PRF-38535, “Inspection lot - class B“) shall be subjected to and pass the internal water vapor content test in accordance with group D6 of test method 5005 of MIL-STD-883. The frequency of the internal water vapor testing may not be decre

26、ased unless approved by the preparing activity. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the ful

27、l case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, th

28、e manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for

29、 device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compli

30、ance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein

31、). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shal

32、l affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V

33、 in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired

34、 to this drawing is required for any change that affects this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93098 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 D

35、SCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits 1/ Unit Min Max High level input voltage VIH-5.46 V VEE -4.94 V for type 01 -5.46 V VEE -4.20 V for type 02 1 2 3 01 -1.130 -1.020

36、 -1.258 -0.810 -0.660 -0.906 V 1, 2, 3 02 -1.165 -0.880 Low level input voltage VIL1, 3 2 01 -1.950 -1.950 -1.480 -1.421 V 1, 2, 3 02 -1.810 -1.475 High level output voltage VOHVCC= VCCO= GND VIN= VIHmaximum, VILminimum Outputs terminated through 50 to -2.0 V. VEE= -4.94 V 1 2 3 01 -0.980 -0.862 -1.

37、097 -0.810 -0.672 -0.906 V EE= -4.20 V 1, 2 3 02 -1.025 -1.097 -0.880 -0.880 Low level output voltage VOLVEE= -5.46 V 1 2 3 01 -1.950 -1.934 -1.972 -1.630 -1.579 -1.652 V 1, 2 3 02 -1.810 -1.810 -1.620 -1.600 High level threshold output voltage VOHTVCC= VCCO= GND VIN= VIHminimum, VILmaximum Outputs

38、terminated through 50 to -2.0 V. VEE= -5.46 V 1 2 3 01 -0.980 -0.862 -1.097 -0.810 -0.672 -0.906 V 1, 2 3 02 -1.025 -1.097 -0.880 -0.880 Low level threshold output voltage VOLTVEE= -4.94 V 1 2 3 01 -1.950 -1.934 -1.972 -1.630 -1.579 -1.652 V VEE= -4.20 V 1, 2 3 02 -1.810 -1.810 -1.620 -1.600 Power s

39、upply drain current IEEVCC= VCCO= GND, VEE= -5.46 V VIN= VIHmaximum Outputs terminated through 50 to -2.0 V. 1, 2, 3 01 -181 mA 1, 3 2 02 -181 -208 High level input current IIHVCC= VCCO= GND VEE= -4.94 V for type 01 = -4.20 V for type 02 VIN= VIHmaximum, VILminimum Outputs terminated through 50 to -

40、2.0 V 1, 2, 3 All 10 150 A Low level input current IILVCC= VCCO= GND, VEE= -5.46 V VIN= VIHmaximum, VILminimum Outputs terminated through 50 to -2.0 V 1, 2, 3 All 0.5 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

41、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-93098 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice t

42、ype Limits 1/ Unit Min Max Functional test See 4.4.1b, VCC= VCCO= GND VEE= -4.94 V, -5.46 V for type 01 = -4.20 V, -5.46 V for type 02 7, 8 All Maximum toggle frequency fMAXSee figure 5 9, 10, 11 All 700 MHz Propagation delay time, clock to Q tPLH1, tPHL19 10 11 01 375 675 175 825 1045 725 ps 9 10 1

43、1 02 375 525 325 825 1025 825 Propagation delay time, MR to Q tPHL29 10 11 01 425 775 175 925 1125 625 ps 9 10 11 02 425 575 375 925 1125 825 Propagation delay time, clock to TC$ $ $ $(all Qs loaded) tPLH3, tPHL39 10 11 01 175 475 175 945 1125 925 ps 9 10 11 02 175 475 175 945 1125 925 Propagation d

44、elay time, clock to TC$ $ $ $(all Qs unloaded) tPLH4, tPHL49 10 11 01 375 675 325 925 1225 875 ps 9 10 11 02 375 475 325 925 1025 875 Propagation delay time, MR to TC$ $ $ $tPLH59 10 11 01 395 475 175 725 1025 675 ps 9 10 11 02 395 575 325 725 1025 675 Setup time, Pn to clock tsu19, 10, 11 All 300 p

45、s Setup time, CE$ $ $ $to clock tsu29, 10, 11 All 850 ps See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93098 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION L

46、EVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C unless otherwise specified Group A subgroupsDevice type Limits 1/ Unit Min Max Setup time, PE$ $ $ $to clock tsu3See figure 5 9, 10, 11 All 650 ps Setup time, TCLD t

47、o clock tsu49, 10, 11 01 600 ps 9, 11 10 02 600 675 Hold time, Pn to clock th19, 10, 11 All 400 ps Hold time, CE$ $ $ $to clock th29, 10, 11 01 200 ps 02 100 Hold time, PE$ $ $ $to clock th39, 10, 11 01 200 ps 02 100 Hold time, TCLD to clock th49, 10, 11 01 200 ps 02 100 Reset recovery time trr9, 10

48、, 11 All 900 ps Minimum pulse width tpw9, 10, 11 All 400 ps Output transition time, Q tTLH1, tTHL19, 10, 11 All 175 725 ps Output transition time, TC$ $ $ $tTLH2, tTHL29, 10, 11 All 175 725 ps 1/ The limits are determined after a device has reached thermal equilibrium. This is defined as the reading taken with the device in a socket with 500 LFPM of +125C or -55C (as applicable) air blowing on the unit in a transverse direction with power applied for at least four minutes before the reading is taken. Provided by IHSNot for ResaleNo reproduction or netw

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