DLA SMD-5962-93153 REV B-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 4K X 9 DUAL PORT STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON《硅单片 4K X 9双口静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. -gap 01-05-15 Raymond Monnin B Boilerplate update and part of five year review. tcr 06-05-16 Raymond Monnin REV SHET REV B B B B B B SHEET 15 16 17 18 19 20 REV STATUS REV B B

2、B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROV

3、ED BY Michael Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-05-19 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 9 DUAL PORT, STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-93153 SHEET 1 OF 20 DSCC FORM 2233 APR 97 59

4、62-E458-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing docume

5、nts two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness A

6、ssurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93153 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawin

7、g number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA d

8、esignator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 7014S35 4k x 9 dual port CMOS SRAM 35 ns 02 7014S25 4k x 9 dual port CMOS SRAM 25 ns 03 7014S20 4k x 9 du

9、al port CMOS SRAM 20 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B mi

10、crocircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 68 Square leadles

11、s chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

12、3153 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range -0.5 V dc to +7.0 V dc Input voltage -0.5 V dc to +6.0 V dc DC output current 50 mA Storage temperature range . -65C to +150C Maximum pow

13、er dissipation (PD) . 2.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): Case X . 10C/W 2/ Junction temperature (TJ) . +150C 3/ 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc High level input voltage range (VIH) . 2.

14、2 V dc to 6.0 V dc Low level input voltage range (VIL) -0.5 V dc to +0.8 V dc 4/ Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to

15、the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Tes

16、t Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist

17、.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may

18、 degrade performance and affect reliability. 2/ When the thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede the value indicated herein. 3/ Maximum junction temperature may be increased to +175C during burn-in and steady-state life. 4/ VIL(min) = -3.0 V dc for p

19、ulse width less than 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government pub

20、lications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Appl

21、ications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These document

22、s also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable

23、laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM)

24、plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and ph

25、ysical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.

26、2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns cannot be implemen

27、ted due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity

28、 upon request. For device classes Q and V alternate test patterns shall be under the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characte

29、ristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrica

30、l test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire S

31、MD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for dev

32、ice class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix

33、 A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristic

34、s. Test Symbol Conditions -55C TC +125C VCC= 4.5 V to 5.5 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max Output high voltage VOHVCC= 4.5 V, IOH= -4.0 mA, 1, 2, 3 All 2.4 V IL= 0.8 V, VIH= 2.2 V Output low voltage VOLVCC= 4.5 V, IOL= 4.0 mA, 1, 2, 3 All 0.4 V VIL= 0.8

35、V, VIH= 2.2 V Input leakage current |ILI| GND VIN VCC, 1, 2, 3 All 10 A CC= 5.5 V Output leakage current |ILO| GND VOUT VCC1, 2, 3 All 10 A Dynamic operating current ICCf = fmax1/, outputs open 1, 2, 3 01 250 mA (both ports active) 02 255 03 260 Input capacitance CINVCC= 5.0 V, VIN= 0 V, 4 All 11 pF

36、 f = 1.0 MHz, TA= +25C, See 4.4.1e Output capacitance COUTVCC= 5.0 V, VOUT= 0 V, 4 All 11 pF f = 1.0 MHz, TA= +25C, See 4.4.1e Functional testing See 4.4.1c 7, 8A, 8B All Read cycle time tAVAVSee figures 4 and 5 2/ 9, 10, 11 01 35 ns 02 25 03 20 Address access time tAVQV9, 10, 11 01 35 ns 02 25 03 2

37、0 Output enable access time tOLQV9, 10, 11 01 20 ns 02 12 03 10 Output hold from address tAVQX9, 10, 11 All 3 ns change Output low Z time tOLQX9, 10, 11 01 3 ns 3/ 4/ 02, 03 0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

38、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C VCC= 4.5 V to 5.5 V Group A subgroups Device ty

39、pe Limits Unit unless otherwise specified Min Max Output high Z time tOHQZSee figures 4 and 5 2/ 9, 10, 11 01 15 ns 3/, 4/ 02 11 03 9 Write cycle time tAVAV9, 10, 11 01 35 ns 02 25 03 20 Address valid to end of tAVWH9, 10, 11 01 30 ns write 02 20 03 15 Address setup time tAVWL9, 10, 11 All 0 ns Writ

40、e pulse width tWLWH9, 10, 11 01 30 ns 02 20 03 15 Write recovery time tWHAX9, 10, 11 All 2 ns Data valid to end of write tDVWH9, 10, 11 01 25 ns 02 15 03 12 Data hold time 5/ tWHQZ9, 10, 11 All 0 ns Write enable to output tWLQZ9, 10, 11 01 15 ns in high Z 3/, 4/ 02 11 03 9 Output active from end tWH

41、QV9, 10, 11 All 0 ns of write 3/, 4/, 5/ Write pulse to data delay tWDD9, 10, 11 01 55 ns 6/ 02 45 03 40 Write data valid to tDDD9, 10, 11 01 45 ns read data delay 6/ 02 35 03 30 1/ fmax= 1/tAVAV= All inputs cycling at f = 1/tAVAV(except OE). f = 0 means no address or control lines change. 2/ AC tes

42、ts are performed with input rise and fall times of 3 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the output load in figure 4, circuit A, unless otherwise specified. 3/ Parameter may not be tested, but shall be guaranteed to the limits specified in Table I. 4/

43、Transition is measured 500 mV from low or high impedance voltage with load. See output load in figure 4, circuit B. 5/ The specification for tWHQZmust be met by the device supplying write data to the RAM under all operating conditions. Although tWHQZand tWHQVvalues will vary over voltage and tempera

44、ture, the actual tWHQZwill always be smaller than the actual tWHQV. 6/ Port-to-port delay through RAM cells from writing port to reading port. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE SUP

45、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Case X (see note) FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE SUPPLY CENT

46、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Symbol Millimeters Inches Min Max Min Max A 1.65 3.05 .065 .120 A1 1.40 1.91 .055 .075 B1 0.20 0.36 .008 .014 B2 1.83 REF .072 REF B3 0.15 0.56 .006 .022 D/E 14.07 14.38 .554 .566 D1/E1 10.16 REF .400 REF D2/E2 5.08

47、 BSC .200 BSC D3/E3 13.59 .535 e 0.64 BSC .025 BSC e1 0.38 .015 h 1.02 REF .040 REF J 0.51 BSC .020 BSC L 1.14 1.40 .045 .055 L1 1.14 1.40 .045 .055 L2 1.96 2.36 .077 .093 L3 0.08 0.38 .003 .015 ND/NE 17 17 N 68 68 Note: The US government preferred system of measurement is the metric SI system. Howe

48、ver, since this item was originally designed using inch-pound units of measurement, in the event of conflict between the metric and inch-pound units, the inch-pound units shall take precedence. FIGURE 1. Case outline - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93153 DEFENSE