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本文(DLA SMD-5962-93177 REV F-2009 MICROCIRCUIT MEMORY DIGITAL CMOS 16K x 9 PARALLEL FIFO MONOLITHIC SILICON.pdf)为本站会员(fatcommittee260)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-93177 REV F-2009 MICROCIRCUIT MEMORY DIGITAL CMOS 16K x 9 PARALLEL FIFO MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R227-93. 93-09-30 Michael A. Frye B Added packages Z and U and device types 04,05, and 06 to drawing. Updated boilerplate. - glg 00-05-30 Raymond Monnin C Added packages T and N. Added radiation features to app

2、ropriate paragraphs. Updated boilerplate paragraphs. ksr 01-12-18 Raymond Monnin D Corrected dose rate to 0.1 rads(Si)/s. Updated boilerplate paragraphs. ksr 02-04-15 Raymond Monnin E Added devices 7,8,9,and 10. ksr 03-10-02 Raymond Monnin F Update to paragraphs, part of regular review cycle. ksr 09

3、02-14 Robert M. Heber REV SHEET REV E E E E E E E E E E E E E E E E E SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

4、43218-3990 http:/www.dscc.dla.mil CHECKED BY Jeff Bowling APPROVED BY Michael A. Frye DRAWING APPROVAL DATE 93-06-09 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K x 9 PARALLEL FIFO, MONOLITHIC SILICON SIZE A CAGE CODE 67268 5962-93177 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY All

5、 DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REVISION LEVEL F SHEET 1 OF 31 DSCC FORM 2233 APR 97 5962-E181-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-93177 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER CO

6、LUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M), space application (device class V). A choice of case outlines and lead finishes are a

7、vailable and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 D 93177 01 Q X A Federal RHA Device Device Case Lead stock class designator

8、type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class

9、M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number 1/ Circuit funct

10、ion Access time 01 7206 16K x 9 parallel CMOS FIFO 50 ns 02 7206 16K x 9 parallel CMOS FIFO 30 ns 03 7206 16K x 9 parallel CMOS FIFO 20 ns 04 7206 16K x 9 low power parallel CMOS FIFO 15 ns 05 72061 16K x 9 low power parallel CMOS FIFO with PHF* 30 ns 06 72061 16K x 9 low power parallel CMOS FIFO wi

11、th PHF* 15 ns 07 7206 16K x 9 low power parallel CMOS FIFO 30 ns 08 7206 16K x 9 low power parallel CMOS FIFO 15 ns 09 72061 16K x 9 low power parallel CMOS FIFO with PHF* 30 ns 10 72061 16K x 9 low power parallel CMOS FIFO with PHF* 15 ns * Programmable Half Flag 1.2.3 Device class designator. The

12、device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendi

13、x A Q, V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line Y CQCC1-N32 32 Rectangular leadless chip

14、carrier Z GDFP2-F28 28 Flat package U GDIP4-T28 or CDIP3-T28 28 Dual-in-line T See figure 1 28 Dual-in-linN See figure 1 28 Flat package _ 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-

15、103 and QML-38535 (see 6.6 herein). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-93177 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.5 Lead fin

16、ish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 2/ Supply voltage range. -0.5 V dc to +7.0 V dc DC output current 50 mA Storage temperature range . -65C to +150C Maximum power dissipation

17、PD). 2.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) packages X, Y, Z, and U See MIL-STD-1835 packages T and N . 2 C/W Junction temperature (TJ) +150C 3/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc Minimum hi

18、gh level input voltage (VIH) 2.2 V dc 4/ Maximum low level input voltage (VIL). 0.8 V dc 5/ Case operating temperature range (TC) -55C to +125C 1.5 Radiation features Maximum total dose available (dose rate = 0.1 rads(Si)/s) . 1.0 x 104rads(Si) Single event phenomenon (SEP) effective linear energy t

19、hreshold (LET) with no upsets 1 MeV-cm2/mg 6/ with no latch-up. 100 MeV-cm2/mg 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified,

20、 the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interfac

21、e Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization D

22、ocument Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ Maximum junction temperature may be

23、 increased to +175C during burn-in and steady-state life. 4/ For XI input, VIH= 2.8 V dc . 5/ 1.5 V dc undershoots are allowed for 10 ns once per cycle. 6/ Contact the device manufacturer for detailed lot information. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

24、se from IHS-,-,-SIZE A 5962-93177 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless other

25、wise specified, the issues of these documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of

26、ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electron

27、ics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or othe

28、r informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has be

29、en obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535, and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect

30、 the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specifi

31、ed in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on fig

32、ure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon r

33、equest. 3.2.5 Timing waveforms. The switching test circuit and waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter lim

34、its are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Unless otherwise specified,

35、 the values specified in table I are the preirradiation and postirradiation values. Postirradiation electrical measurements for any RHA level are tested at, TA= +25C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-93177 STANDARD MICROCIR

36、CUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number

37、 is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M s

38、hall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certi

39、ficate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in ord

40、er to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of

41、MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with eac

42、h lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and rev

43、iew for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assign

44、ment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or

45、as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For devi

46、ce classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices pri

47、or to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. The test circ

48、uit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (1) Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein). c. Interim and final electrical parameters shall be as specified in table IIA herein. Provided by IHS

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