DLA SMD-5962-93209 REV C-2009 MICROCIRCUIT LINEAR DUAL LOW POWER FET-INPUT OPERATIONAL AMPLIFIER MONOLITHIC.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make change to the CMRR test as specified under Table I. Changes in accordance with N.O.R. 5962-R102-95. 95-03-22 M. A. FRYE B Drawing updated to reflect current requirements. Redrawn. - ro 02-01-07 M. A. FRYE C Update boilerplate paragraphs to c

2、urrent MIL-PRF-38535 requirements. - ro 09-10-13 C. SAFFLE REV SHET REV SHET REV STATUS REV C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING TH

3、IS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY MICHAEL FRYE MICROCIRCUIT, LINEAR, DUAL, LOW POWER, FET-INPUT OPERATIONAL AMPLIFIER, MONOLITHIC DRAWING APPROVAL DATE 94-12-16 AMSC N/A REVISION LEVEL C SIZE A CAGE COD

4、E 67268 5962-93209 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E517-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC

5、 FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Numbe

6、r (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93209 01 M P A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (s

7、ee 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specifi

8、ed RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 AD822 Dual, rail-to-rail, FET-input operational amplifier 1.2.3 D

9、evice class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with

10、MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8 8 Dual-in-line 1.2.5 Lead finish. The le

11、ad finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLU

12、MBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VS) . 18 V Input common mode range . VSPower dissipation (PD) 1.3 W 2/ Lead temperature range (soldering, 10 seconds) . +300C Storage temperature range . -65C to +150C Thermal resist

13、ance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) 100C/W 1.4 Recommended operating conditions. Positive voltage supply range (+VS) . +5 V to +15 V Negative voltage supply range (-VS) . -15 V to 0 V Ambient operating temperature range (TA) . -55C to +125C 2.

14、APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DE

15、PARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL

16、-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

17、 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses

18、 above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Derate at 9 mW/C for TA +32C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

19、NDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as spe

20、cified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JA

21、N class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case ou

22、tline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance cha

23、racteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are

24、 defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5

25、962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The c

26、ertification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required

27、from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certific

28、ate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A an

29、d herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M.

30、 For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain

31、 the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit

32、 group number 49 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97

33、TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA+125C unless otherwise specified Group A subgroups Device type Limits 1/ Unit Min Max Input offset voltage VOSVS= 5 V 1 01 0.8 mV 2,3 2.0VS= +5 V 1 0.8 2,3 2.0VS= 15 V 1 2.0 2,3 3.0Input bias current IIBVS= 5 V, VCM= 0 V,

34、 TA= +25C 1 01 25 pA VS= +5 V, VCM= 1.0 V, TA= +25C 25 VS= 15 V, VCM= 0 V, TA= +25C 25 Input offset current IOSVS= 5 V, VCM= 0 V, TA= +25C 1 01 20 pA VS= +5 V, VCM= 1.0 V, TA= +25C 20 VS= 15 V, VCM= 0 V, TA= +25C 20 Open loop gain AOLVS= 15 V, TA= +25C, RL= open circuit, VCM= -10 V to 10 V 1 01 2.0

35、V/V VS= 5 V, TA= +25C, RL= open circuit, VCM= -4 V to 4 V 2.5 VS= +5 V, TA= +25C, RL= open circuit, VCM= 0.2 V to 4 V 2.5 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DE

36、FENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA+125C unless otherwise specified Group A subgroups Device type Limits 1/ Unit Min Max Open loop gain AVOLVS=

37、15 V, RL= 1 k, 1 01 33.3 V/V VCM= -10 V to 10 V 2,3 50 VS= 5 V, RL= 1 k, 1 50 VCM= -4 V to 4 V 2,3 100 VS= +5 V, RL= 1 k, 1 66.6 VCM= 0.2 V to 4 V 2,3 100 Power supply rejection ratio PSRR VS= 5 V to 15 V 1,2,3 01 318 V/V Common mode rejection ratio CMRR VS= 15 V, VCM= -10 V to 10 V 1,2,3 01 318 V/V

38、 VS= 5 V, VCM= -5 V to +2 V 500 VS= +5 V, VCM= 0.0 V to +2 V 650 Positive output voltage swing +VOUTVS= 15 V, TA= +25C, RL= open circuit 1 01 14.8 15.5 V VS= 5 V, TA= +25C, RL= open circuit 4.8 5.5 VS= +5 V, TA= +25C, RL= open circuit 4.8 5.5 VS= 15 V, TA= +25C, RL= 1 k 14.0 15.5 VS= 5 V, TA= +25C,

39、RL= 1 k 4.5 5.5 VS= +5 V, TA= +25C, RL= 1 k 4.5 5.5 See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

40、C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA+125C unless otherwise specified Group A subgroups Device type Limits 1/ Unit Min Max Negative output voltage swing -VOUTVS= 15 V, TA= +25C, RL= open circuit 1 01 -15.5 -14.8 V VS

41、= 5 V, TA= +25C, RL= open circuit -5.5 -4.8 VS= +5 V, TA= +25C, RL= open circuit -0.1 0.1 VS= 15 V, TA= +25C, RL= 1 k -15.5 -14.0 VS= 5 V, TA= +25C, RL= 1 k -5.5 -4.5 VS= +5 V, TA= +25C, RL= 1 k -0.1 0.1 Power supply current IQVS= 15 V 1,2,3 01 1.9 mA VS= 5 V 1.7 VS= 5 V 1.6 1/ The algebraic convent

42、ion, whereby the most negative value is a minimum and the most positive is a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

43、DARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outline P Terminal number Terminal symbol 1 OUTPUT 1 2 -INPUT 13 +INPUT 1 4 -VS5 +INPUT 2 6 -INPUT 27 OUTPUT 2 8 +VSFIGURE 1. Termin

44、al connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93209 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and i

45、nspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device cla

46、ss M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For devi

47、ce class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition B. The test circuit shall be main

48、tained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device