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本文(DLA SMD-5962-93244 REV A-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 512K X 8 BIT 5-VOLT PROGRAMMING EEPROM MONOLITHIC SILICON.pdf)为本站会员(terrorscript155)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-93244 REV A-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 512K X 8 BIT 5-VOLT PROGRAMMING EEPROM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated boilerplate to current requirements. lhl 12-12-21 Charles F. Saffle REV SHEET REV A A A A A A A SHEET 15 16 17 18 19 20 21 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Ga

2、ry L. Gross DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Jeff Bowling APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL

3、, CMOS 512K X 8 BIT 5-VOLT PROGRAMMING EEPROM, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-12-08 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-93244 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E099-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

4、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (devic

5、e class M and Q). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93244 01

6、 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device class Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels a

7、nd are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit functi

8、on as follows: Device type Generic number Circuit function Access time Endurance 01 AT29C040 512K x 8 CMOS 5-VOLT PROGRAMMING EEPROM 200 ns 1000 cycles 02 AT29C040 512K x 8 CMOS 5-VOLT PROGRAMMING EEPROM 150 ns 1000 cycles 1.2.3 Device class designator. The device class designator is a single letter

9、 identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MI

10、L-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T32 or CDIP2-T32 32 Dual-in-line Y CDFP1-F32 32 Flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535

11、for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC

12、FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) 2/ -0.5 V dc to +6.0 V dc Voltage on any pin with respect to ground 2/. -0.5 V dc to +6.0 V dc Voltage on pin A9 and OE with respect to ground 3/ -0.5 V dc to +13.5 V dc Storage temperature range -65C to +150C Maximum power

13、 dissipation (PD) 1.0 W Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) 4/ +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Data retention 20 years minimum Endurance 1000 cycles/sector, minimum 1.4 Recommended operating conditions. Supply voltage range (VCC)

14、-4.5 V dc to +5.5 V dc Case operating temperature range (TC). 55C to +125C Low level input voltage range (VIL) -0.5 V dc to +0.8 V dc High level input voltage range (VIH1) +2.0 V dc to VCC +0.5 V dc High level input voltage range (VIH2) VCC -0.5 V dc to VCC +0.5 V dc Chip clear voltage (VH) +12.0 0.

15、5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or co

16、ntract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HAN

17、DBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-

18、5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Minimum dc voltage on input or VO pins is -0.5 V. During voltage transitions, inputs may overshoot VSS to -1.0

19、V for periods of up to 20 ns. Maximum dc voltage on output and VO pins is VCC +0.5 V. During voltage transitions outputs may overshoot to VCC +1.0 V for periods up to 20 ns. 3/ Maximum dc input voltage on A9 or OE may overshoot to +14.0 V for periods of less than 20 ns. 4/ Maximum junction temperatu

20、re shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ All voltages are referenced to VSS (ground). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

21、CUIT DRAWING SIZE A 5962-93244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the document

22、s which are DoD adopted are those listed in the issue of the DoDISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DoDISS are the issues of the documents cited in the solicitation. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD 78 - IC Latch-U

23、p Test. (Copies of this document are available online at www.jedec.org/ or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201) (Non-Government standards and other publications are normally available from the organizations that prepare or distribut

24、e the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document,

25、however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes N, Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein, or as modified in the device ma

26、nufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified here

27、in. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in acc

28、ordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table(s) shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified here

29、in, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electri

30、cal tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has t

31、he option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certi

32、fication/compliance mark. The certification mark for device classes Q, and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate

33、of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103

34、(see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M,

35、 the requirements of MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97

36、3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For devic

37、e class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes

38、 agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered

39、 by this drawing shall be in microcircuit group number 042 (see MIL-PRF-38535, appendix A). 3.11 Processing of EEPROMs. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.11.1 Conditions of the supplied devices. Devices will b

40、e supplied in an unprogrammed or clear state. No provision will be made for supplying programmed devices. 3.11.2 Erasure of EEPROMs. When specified, devices shall be erased in accordance with procedures and characteristics specified in 4.6.3. 3.11.3 Programming of EEPROMs. When specified, devices sh

41、all be programmed in accordance with procedures and characteristics specified in 4.6.4. Software data protect procedures shall be as specified in 4.6.5. 3.11.4 Verification of state of EEPROMs. When specified, devices shall be verified as either written to the specified pattern or cleared. As a mini

42、mum, verification shall consist of performing a read of the entire array to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure and the device shall be removed from the lot or sample. 3.11.5 Power supply sequence of E

43、EPROMs: In order to reduce the probability of inadvertent writes, the following power supply sequences shall be observed: a. A logic high state shall be applied to WE and/or CE at the same time or before the application of VCC. b. A logic high state shall be applied to WE and/or CE at the same time

44、or before the removal of VCC. 3.12 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the reprogrammability of the device.

45、The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquir

46、ing or preparing activity, along with test data. 3.13 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect data retention. The methods

47、and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with

48、 test data. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93244 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 1/ 4.5 V VCC 5.5 V Group A subgroups Device type Limits Unit unless otherwise

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