DLA SMD-5962-93249 REV B-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 512 X 9 PARALLEL SYNCHRONOUS FIFO MONOLITHIC SILICON《硅单片 512 X 9并行同步先进先出 氧化物半导体数字记忆微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 01-06-05 Raymond Monnin B Boilerplate update and part of five year review. tcr 06-05-09 Raymond Monnin REV SHET REV B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23

2、 24 25 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE

3、 BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512 X 9 PARALLEL SYNCHRONOUS FIFO, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-12-16 MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-93249 SHEET 1 OF 25 DSCC FORM 2233

4、 APR 97 5962-E414-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This draw

5、ing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation

6、Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93249 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3

7、) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropr

8、iate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 72211L50 512 x 9 CMOS Parallel Synchronous FIFO 50 ns 02 72211L35 512 x 9 CMOS Parallel Synchronou

9、s FIFO 35 ns 03 72211L25 512 x 9 CMOS Parallel Synchronous FIFO 25 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for M

10、IL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals

11、Package style X CQCC1-N32 32 Rectangular leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

12、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Terminal voltage with respect to ground . -0.5 V dc to +7.0 V dc DC output current 50 mA Storage temperature r

13、ange . -65C to +135C Maximum power dissipation (PD) 1.25 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): See MIL-STD-1835 Junction temperature (TJ). +175C 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5 V dc Supply voltage (GND

14、) . 0 V Input high voltage (VIH) 2.2 V dc minimum Input low voltage (VIL) . 0.8 V dc maximum Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this d

15、rawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD

16、-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at ht

17、tp:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum

18、levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 AP

19、R 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 7

20、8 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute th

21、e documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, howe

22、ver, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacture

23、rs Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 D

24、esign, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.

25、2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical

26、 performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for eac

27、h subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not

28、marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/complian

29、ce mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shal

30、l be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein)

31、. The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535,

32、 appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo

33、reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +1

34、25C 4.5 V VCC 5.5 V Group A subgroups Device type Limit Unit unless otherwise specified Min Max Input leakage current ILI0.4 V VIN VCC1, 2, 3 All -10 +10 A Output leakage current ILOOE VIH, 0.4 VOUT VCC1, 2, 3 All -10 +10 A Output high voltage VOHIOH= -2 mA 1, 2, 3 All 2.4 V Output low voltage VOLIO

35、L= 8 mA 1, 2, 3 All 0.4 V Active power supply ICCf = 20 MHz, outputs open 1, 2, 3 All 160 mA current Input capacitance CINVIN= 0 V, f = 1.0 MHz, TA= +25C, see 4.4.1e 4 All 10 pF Output capacitance COUTVOUT= 0 V, f = 1.0 MHz, with output deselected ( OE = high), TA= +25C, see 4.4.1e 4 All 10 pF Funct

36、ional tests See 4.4.1c 7, 8A, 8B All Clock cycle frequency fs 9, 10, 11 01 20 MHz 02 28.6 03 40 Data access time tA9, 10, 11 01 3 25 ns 02 3 20 03 3 15 Clock cycle time tCLK9, 10, 11 01 50 ns 02 35 03 25 Clock high time tCLKH9, 10, 11 01 20 ns 02 14 03 10 Clock low time tCLKL9, 10, 11 01 20 ns 02 14

37、 03 10 Data setup time tDS9, 10, 11 01 10 ns 02 8 03 6 First read latency time tFRLCL= 30 pF, input pulse levels = GND to 3.0 V; input rise/fall times 3 ns; input/output timing reference levels = 1.5 V; see figure 3 and 4 9, 10, 11 All 1/ ns See footnotes at end of table. Provided by IHSNot for Resa

38、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Condit

39、ions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limit Unit unless otherwise specified Min Max Data hold time tDH9, 10, 11 01, 02 2 ns 03 1 Enable setup time tENS9, 10, 11 01 10 ns 02 8 03 6 Enable hold time tENH9, 10, 11 01, 02 2 ns CL= 30 pF, input pulse levels = GND to 3.0 V; inpu

40、t rise/fall times 3 ns; input/output timing reference levels = 1.5 V; see figure 3 and 4 03 1 Reset pulse width 2/ tRS9, 10, 11 01 50 ns 02 35 03 25 Reset setup time tRSS9, 10, 11 01 50 ns 02 35 03 25 Reset recovery time tRSR9, 10, 11 01 50 ns 02 35 03 25 Reset to flag and output tRSF9, 10, 11 01 50

41、 ns time 02 35 03 25 Output enable to output in low Z 3/tOLZ9, 10, 11 All 0 ns Output enable to output tOE9, 10, 11 01 3 28 ns valid 02 3 15 03 3 13 Output enable to output tOHZ9, 10, 11 01 3 28 ns in high Z 3/ 02 3 15 03 3 13 See footnotes at end of table. Provided by IHSNot for ResaleNo reproducti

42、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +1

43、25C 4.5 V VCC 5.5 V Group A subgroups Device type Limit Unit unless otherwise specified Min Max Write clock to full flag tWFFCL= 30 pF, input pulse levels 9, 10, 11 01 30 ns = GND to 3.0 V; input rise/fall 02 20 times 3 ns; input/output timing 03 15 Read clock to empty flag tREFreference levels = 1.

44、5 V; 9, 10, 11 01 30 ns see figure 3 and 4 02 20 03 15 Read clock to almost- tPAE9, 10, 11 01 30 ns empty flag 02 20 03 15 Write clock to almost-full tPAF9, 10, 11 01 30 ns flag 02 20 03 15 Skew time between read tSKEW19, 10, 11 01 15 ns clock and write clock 02 12 for empty flag & full flag 03 10 S

45、kew time between read tSKEW29, 10, 11 01 45 ns clock and write clock for 02 42 almost-empty flag & 03 40 almost-full flag 1/ When tSKEW1 the minimum limit, tFRL(maximum) = tCLK+ tSKEW1. When tSKEW1 the minimum limit, tFRL(maximum) = either 2tCLK+ tSKEW1or tCLK+ tSKEW1. The latency timing applies onl

46、y at the empty boundary ( EF = LOW). 2/ Pulse widths less than the minimum values specified are not allowed. 3/ If not tested, shall be guaranteed to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU

47、IT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Device type All Case outline X Terminal number Terminal symbol 1 D52 D43 D34 D25 D16 D07 PAF 8 PAE 9 GND 10 1REN 11 RCLK 12 2REN 13 OE 14 EF 15 FF 16 Q017 Q118 Q219 Q3

48、20 Q421 Q522 Q623 Q724 Q825 VCC26 WEN2/ LD 27 WCLK 28 1WEN 29 RS 30 D831 D732 D6FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93249 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM