DLA SMD-5962-93262 REV D-2006 MICROCIRCUIT LINEAR CMOS 6-BIT FLASH A D CONVERTER MONOLITHIC SILICON《硅单片 6位动画文件交流 直流转变器 氧化物半导体线性微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R149-97 96-12-10 Raymond Monnin B Changes in accordance with NOR 5962-R345-97 97-06-17 Raymond Monnin C Changes to table I. - drw 99-07-16 Raymond Monnin D Update drawing to current requirements. Editorial chan

2、ges throughout. - drw 06-07-24 Raymond Monnin REV SHET REV SHET REV STATUS REV D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Sandra Rooney DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Sandra Rooney COLUMBUS, OHIO 43218-3990 http:/www.ds

3、cc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, CMOS, 6-BIT FLASH AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-05-31 A/D CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-93262 S

4、HEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E536-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1.

5、 SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When availa

6、ble, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93262 01 M V A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead fini

7、sh (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and

8、are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit function 01 MN5906 6-bit A/D converter 1.2.3 Device class designator. The device class designator i

9、s a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qu

10、alification to MIL-PRF-38535 1.2.4 Case outline. The case outline is as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package style V GDIP1-T18 or CDIP2-T18 18 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes

11、 Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234

12、 APR 97 1.3 Absolute maximum ratings. 1/ Power supply voltage (VDD) -0.5 V dc to +7.0 V dc Analog input voltage (VAIN). -0.5 V dc to VDD+ 0.5 V dc Digital inputs (VIH, VIL) -0.5 V dc to VDD+ 0.5 V dc Reference input voltage (VREF) 0 V to VDD+ 0.5 V dc Storage temperature range -65C to +150C Lead tem

13、perature (soldering, 10 seconds) +300C Junction temperature (TJ) +175C Thermal resistance, junction-to-ambient (JA) 60C/W Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Power dissipation (PD) . 300 mW 1.4 Recommended operating conditions. Ambient operating temperature range (TA) -55C to

14、 +125C Supply voltage (VDD) +5.0 V dc Upper reference voltage +2.75 V dc Lower reference voltage 0 V 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unles

15、s otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. M

16、IL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http

17、:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothi

18、ng in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. P

19、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individu

20、al item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual i

21、tem requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein

22、for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Digital output coding table. The digital

23、 output coding table shall be as specified on figure 2. 3.2.4 Truth table. The truth table shall be as specified on figure 3. 3.2.5 Block diagram. The block diagram shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise sp

24、ecified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table

25、II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the man

26、ufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix

27、 A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V,

28、a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in

29、 MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, th

30、e requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

31、3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC,

32、DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices co

33、vered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 RE

34、VISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDigital input logic levels VIH1, 2, 3 All 3.5 V VIL1.5 Digital output logic levels VOH4 mA lo

35、ad 1, 2, 3 All 4.6 V VOL0.4 Total reference resistance RTR1, 2, 3 All 45 130 Output propagation delay tPDMeasured from the falling edge of clock to data out on bit 1 and bit 6, see figure 5 9, 10, 11 All 8 18 ns Integral linearity error INL Endpoint method, fS= 45 MHz 4, 5 All -1.0 +1.0 LSB 6 -1.0 +

36、1.5 Differential linearity error DNL fS= 45 MHz 4, 5, 6 All -0.9 +1.25 LSB Zero error ZE Nominal is VREF+0.5 LSB, fS= 45 MHz 4, 5, 6 All 0 +3.0 LSB Full scale error FSE Nominal is +VREF-1.5 LSB, fS= 45 MHz 4, 5, 6 All -2.0 +2.0 LSB Power supply current drain IDDOutput all zeros, fS= 45 MHz 1, 2, 3 A

37、ll 66 mA Signal-to-noise + distortion ratio SNR 45 MSPS conversion rate, fAIN= 1 MHz 4 All 32 dB 45 MSPS conversion rate, fAIN= 10 MHz 4, 5, 6 27.5 Spurious free dynamic range SFDR fAIN= 1 MHz 4 All 40 dB AIN= 10 MHz 4, 5, 6 33 Functional tests See 4.4.1b 7, 8 All Provided by IHSNot for ResaleNo rep

38、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline V Terminal number Terminal symbol 1 -VREF2 +VREF3 CS 2 4

39、1 CS 5 +VDD6 +VDD7 GND 8 AIN9 RMID10 BIT 6 (LSB) 11 BIT 5 12 BIT 4 13 BIT 3 14 BIT 2 15 BIT 1 (MSB) 16 OF 17 GND 18 CLK FIGURE 1. Terminal connections. ANALOG INPUT OF MSB LSB +VREF1 1 1 1 1 1 1 +VREF- 1/2 LSB * 1 1 1 1 1 1 +VREF- 1 LSB 0 1 1 1 1 1 1 +VREF- 3/2 LSB 0 1 1 1 1 1 * +1/2 VREF+ 1/2 LSB 0

40、 1 0 0 0 0 * +1/2 VREF- 1/2 LSB 0 * * * * * * +1/2 VREF- 3/2 LSB 0 0 1 1 1 1 * +1/2 LSB 0 0 0 0 0 0 * 0 0 0 0 0 0 0 0 NOTE: Analog inputs listed are the theoretical values for the transitions indicated above. With the converter continuously converting, the output bits indicated as “*” will change fr

41、om a logic “0” to a logic “1” or vice versa as the input voltage passes through the indicated level. FIGURE 2. Digital output coding. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTE

42、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 1 CS CS 2 B1 B6 OF 0 1 Valid Valid 1 1 High-Z Valid X 0 High-Z High-Z FIGURE 3. Truth table. FIGURE 4. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

43、STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 FIGURE 5. Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR

44、AWING SIZE A 5962-93262 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the

45、device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V,

46、 screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality confo

47、rmance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition B. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon r

48、equest. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The bur