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本文(DLA SMD-5962-94513 REV D-2012 MICROCIRCUIT LINEAR LOW POWER PULSE WIDTH MODULATOR MONOLITHIC SILICON.pdf)为本站会员(medalangle361)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-94513 REV D-2012 MICROCIRCUIT LINEAR LOW POWER PULSE WIDTH MODULATOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Sheet 5: Table I, Amplitude test, limits column, delete “2.30” min and “2.50” max, and substitute “2.23” min and “2.55” max. COMP source current test, ISO, conditions column, delete “”FB = 1.8 V, COMP = REF 1 V” and substitute “FB = 1.8 V, COMP =

2、 REF 1.2 V”. Sheet 6: Over-current threshold test, VOC, limits column, delete “1.35” min and “1.60” max, and substitute “1.42” min and “1.68” max. Changes in accordance with NOR 5962-R030-96. 96-02-07 Michael Frye B Changes made to VOUT, amplitude, fO, and IIBtests in table I. Changes also made to F

3、igure 2. Update boilerplate. lgt 01-02-28 Raymond Monnin C Update drawing as part of 5 year review. rrp 06-09-05 Raymond Monnin D Add footnote 3/ under paragraph 1.3. Add lead temperature limit under paragraph 1.3. Make change to Analog inputs under paragraph 1.3. Add line regulation test to Table I

4、. Table I, Oscillator frequency test; for device types 01, 02, 04 change limits to 40 kHz min and 52 kHz max; for device types 03, 05, change limits to 26 kHz min and 36 kHz max. Add footnote 8/ to the VCCzener shunt voltage test. Add footnote 7/ to Shunt to start difference test. Table I, footnote

5、1/, delete 0.01 F and replace with 0.1 F. Update boilerplate paragraph to current MIL-PRF-38535 requirements. - ro 12-05-16 Charles F. Saffle REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARI

6、TIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY CHARLES E. BESORE APPROVED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, LOW POWER, PULSE WIDTH MODULATO

7、R, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-12-22 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-94513 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E191-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

8、2-94513 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlin

9、es and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94513 01 M P A Federal stock class designator RHA

10、 designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA

11、designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic numb

12、er Circuit function Turn-on threshold Turn-off threshold 01 UCC1801 Pulse width modulator 9.4 V 7.4 V 02 UCC1802 Pulse width modulator 12.5 V 8.3 V 03 UCC1803 Pulse width modulator 4.1 V 3.6 V 04 UCC1804 Pulse width modulator 12.5 V 8.3 V 05 UCC1805 Pulse width modulator 4.1 V 3.6 V 1.2.3 Device cla

13、ss designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-3

14、8535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8 8 Dual-in-line 1.2.5 Lead finish. The lead finish

15、 is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94513 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3

16、990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage . 12.0 V 3/ Supply current . 30.0 mA 3/ OUTPUT current 1.0 A OUTPUT energy (capacitive load) . 20.0 J Analog inputs (FB, CS, RC, COMP) -0.3 V to the lesser of 6.3 V or VCC+ 0.3 V Power dissipation (

17、PD) at TA +25C . 1.0 W Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) . 160C/W 1.4 Recommended operating conditions. Supply voltage . 10.0 V Ambient operati

18、ng temperature (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those ci

19、ted in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlin

20、es. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Bu

21、ilding 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific ex

22、emption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages are respect to ground. All currents are positive into the specified terminal.

23、3/ In normal operation, VCCis powered through a current limiting resistor. Absolute maximum of 12 V applies when VCCis driven from a low impedance source such that ICCdoes not exceed 30 mA (which includes gate drive current requirement). The resistor should be sized so that the VCCvoltage, under ope

24、rating conditions is below 12 V but, above the turn off threshold. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94513 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234

25、 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form

26、, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimen

27、sions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on

28、figure 1. 3.2.3 Block diagram. The logic diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in

29、table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PI

30、N listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA design

31、ator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ a

32、s required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the require

33、ments of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listi

34、ng as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certifica

35、te of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Mar

36、itime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain

37、the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit

38、group number 110 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94513 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I.

39、Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Reference section Output voltage VOUTIDRIVER= 0.2 mA, 1 01, 02 04 4.925 5.075 V TA= +25C 03, 05 3.94 4.06 Load regulation VLDIOUT= 0.2 mA to

40、5 mA 1, 2, 3 All 30 mV Line regulation VLNVCC= 10 V to clamp, 1 All 1.9 mV/V IVCC= 25 mA 2,3 2.5 Total variation VTV3/ 1, 2, 3 01, 02 04 4.88 5.10 V 03, 05 3.90 4.08 Output short circuit current IOS1, 2, 3 All -5 -35 mA Oscillator section Amplitude 1, 2, 3 All 2.23 2.55 V Oscillator frequency fO4/ 4

41、, 5, 6 01, 02 04 40 52 kHZ 03, 05 26 36 Error amplifier section Input voltage VINVCOMP= 2.5 V 1, 2, 3 01, 02 04 2.44 2.56 mV VCOMP= 2.0 V 03, 05 1.95 2.05 Input bias current IIB1, 2, 3 01 -1 1 A COMP sink current ISIFB = 2.7 V, COMP = 1.1 V 1, 2, 3 ALL 0.3 3.5 mA COMP source current ISOFB = 1.8 V, C

42、OMP = REF 1.2 V 1, 2, 3 ALL -0.2 -0.8 mA Open loop voltage gain OLVG 4, 5, 6 ALL 60 dB Pulse width modulator section Maximum duty cycle 4, 5, 6 01, 04 05 48 50 % 02, 03 97 100 Minimum duty cycle COMP = 0 V 4, 5, 6 ALL 0 % See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or

43、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94513 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TA+125C unless

44、 otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Current sense section. Maximum input signal VINCOMP = 5 V 5/ 1, 2, 3 ALL 0.9 1.1 V Input bias current IIB1, 2, 3 ALL -200 200 nA Over-current threshold VOC1, 2, 3 ALL 1.42 1.68 V COMP to CS offset CS = 0 V 1, 2, 3 ALL 0.45 1.3

45、5 V Gain 6/ 4, 5, 6 ALL 1.10 1.80 V/V CS blank time tCS9, 10, 11 ALL 50 150 ns Output section OUTPUT low level voltage VOUTLI = 20 mA 1, 2, 3 ALL 0.4 V I = 200 mA 0.90 I = 50 mA, VCC= 5 V 03, 05 0.40 I = 20 mA, VCC= 0 V ALL 1.2 OUTPUT high VSAT, VOUTHI = 20 mA 1, 2, 3 ALL 0.4 V (VCC- OUTPUT) I = 200

46、 mA 1.9 I = 50 mA, VCC= 5 V 03, 05 0.9 Rise time tRCL= 1 nF 9, 10, 11 ALL 70 ns Fall time tFCL= 1 nF 9, 10, 11 ALL 75 ns Under-voltage lock-out section Start threshold voltage 7/ 1, 2, 3 01 8.6 10.2 V 02, 04 11.5 13.5 03, 05 3.7 4.5 Minimum operating voltage after start 7/ 1, 2, 3 01 6.8 8.0 V 02, 0

47、4 7.6 9.0 03, 05 3.2 4.0 Hysteresis after start 1, 2, 3 01 1.6 2.4 V 02, 04 3.5 5.1 03, 05 0.2 0.8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94513 DLA LAND AND MARITIME CO

48、LUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TA+125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Overall section Start-up current VCC start threshold 1, 2, 3 ALL 0.2 mA Operating supply current FB = 0 V, CS = 0 V, OSC disabled 1, 2, 3 ALL 1.0 mA VCCzener shunt voltage ICC= 10 mA 7/ 8/ 1, 2, 3 ALL 12 15 V Shunt to start difference 7/ 1, 2, 3 02, 04 0.5 V 1/ VCC= 10 V. Adjust VCCabove the start thresho

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