DLA SMD-5962-94514 REV B-2004 MICROCIRCUIT LINEAR MICROPROCESSOR SUPERVISORY CIRCUIT MONOLITHIC SILICON《硅单片 微处理器监督电路 氧化物半导体线性微型电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R020-95. 94-10-21 M. A. FRYE B Replaced reference to MIL-STD-973 with reference to MIL-PRF-38535. Drawing updated to reflect current requirements. Redrawn. -rrp 04-05-13 R. MONNIN REV SHET REV SHET REV STATUS R

2、EV B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY RICK C. OFFICER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY CHARLES E. BESORE COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROV

3、ED BY MICHAEL A. FRYE MICROCIRCUIT, LINEAR, MICROPROCESSOR SUPERVISORY CIRCUIT, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-01-18 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-94514 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E279-04 Provided by IHSNot

4、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance clas

5、s levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are refl

6、ected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94514 01 M P X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator.

7、 Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicate

8、s a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 MAX1232 Microprocessor supervisory circuit 1.2.3 Device class designator. The device class designator is a single letter identifying the product assur

9、ance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline

10、(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8 8 Dual-in-line 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device cl

11、asses Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3 DSCC FORM

12、 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage to ground (VCCto GND) -0.3 V to +6.0 V Maximum current at any terminal 10 mA Input voltage ST , TOL, RST PB , TD -0.3 V to (VCC+ 0.3 V) Power dissipation (PD) at TA= +70C: Case P 640 mW 2/ Case 2 727 mW 2/ Lead temperature (soldering, 10 s

13、econds) . +300C Storage temperature range . -65C to +160C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case P +125C/W Case 2 +110C/W 1.4 Recommended operating conditions. Supply voltage range +4.5 V to +5.5 V Ambient operating temperature r

14、ange (TA) . -55C to +125C Input capacitance (CIN) at ST and TOL pins 5 pF Output capacitance (COUT) at RST and RST pins 7 pF 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent

15、 specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE SPECIFICATION MIL-STD-883 - Test Meth

16、od Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE SPECIFICATION MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.d

17、aps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawi

18、ng takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance

19、 and affect reliability. 2/ For case P, derate 8.0 mW/C at TA +70C. For case 2, derate 9.09 mW/C at TA +70C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO

20、 43216-5000 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The

21、 modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical di

22、mensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connect

23、ions. The terminal connections shall be as specified on figure 1. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics a

24、nd postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table

25、 I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the devi

26、ce. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark

27、 for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

28、listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance

29、 submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Cer

30、tificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class

31、 M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to re

32、view the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105

33、 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electric

34、al performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max High level input voltage, ST and RST PB pins VIH3/ 1,2,3 01 2.0 V Low level input voltage, ST and RST PB pins VIL1,2,3 01 0.8 V Input leakage curren

35、t, TOL and ST pins IIL1,2,3 01 -1.0 1.0 A High output current, RST pin IOHVOH= 2.4 V 1,2,3 01 -1.0 A Low output current, RST and RST pins IOLVOL= 0.4 V 1,2,3 01 2.0 mA Operating current ICCMeasured with outputs open 1,2,3 01 200 A Supply current 5% trip point VCCTPAll voltages referenced to GND 1,2,

36、3 01 4.50 4.74 V Supply current 10% trip point VCCTPAll voltages referenced to GND, TOL = VCC1,2,3 01 4.25 4.49 V Push button reset input tPB4/ 9,10,11 01 20 ms Push button reset delay tPBD5/ 9,10,11 1 20 Reset active time tRST9,10,11 01 250 1000 ms TD pin = 0 V 62.5 250 TD pin = open 250 1000 ST ti

37、meout period tTDTD pin = VCC9,10,11 01 500 2000 ms ST pulse width tPW9,10,11 01 75 ns Supply voltage detect to RST low and RST high tRPDVCCfalling 9,10,11 01 100 ns Supply voltage detect to RST open RST low tRPUVCCrising, tR 5 s 9,10,11 01 250 1000 ms 1/ Unless otherwise specified, VCC= +4.5 V to +5

38、.5 V. See figure 3. 2/ The algebraic convention, whereby the most negative value is a minimum and the most positive is a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal. 3/ The push button reset input ( RST PB ) pin is internall

39、y pulled up to VCCwith an internal impedance of 40 k. 4/ The push button reset input ( RST PB ) pin must be held low for a minimum of 20 ms to guarantee reset. 5/ For subgroups 10 and 11, if not tested, shall be guaranteed to the limits specified in table I herein. Provided by IHSNot for ResaleNo re

40、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines P 2 Terminal number Terminal symbol 1 RST PB NC 2 TDRST

41、 PB 3 TOL NC4 GND NC 5 RST TD 6 RST NC 7 ST TOL 8 VCCNC 9 - NC 10 - GND 11 - NC 12 - RST 13 - NC 14 - NC 15 - RST 16 - NC 17 - ST 18 - NC 19 - NC 20 - VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCI

42、RCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 2. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962

43、-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 The top waveform is for Pushbutton reset. The debounced RST PB input ignores input pulses less than 1 ms and is guaranteed to recognize pulse of 20 ms or greater. The bottom waveform is for

44、 strobe. Strobe input pulse width (tTD) is the maximum elapsed time between ST high-to-low transistions ( ST is activated by falling edges only) which will keep the watchdog timer from forcing the reset outputs active for a time of tRST. tTDis a function of the voltage at the TD pin, as tabulated be

45、low: Condition Minimum Maximum TD pin = 0 V 62.5 ms 250 ms TD pin = open 250 ms 1000 ms TD pin = VCC500 ms 2000 ms FIGURE 3. Timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUP

46、PLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 For the top set of waveform, VCCdetect reset output delay (power-down). VCCslew rate = 1.66 V/s (0.5 V/300 s). For the bottom set of waveform, VCCdetect reset output delay (power-up). FIGURE 3. Timing wavefo

47、rms Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94514 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and i

48、nspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38