DLA SMD-5962-94550-1995 MICROCIRCUIT DIGITAL 32-BIT RISC MICROPROCESSOR MONOLITHIC SILICON《硅单片 32位RISC微处理器 数字微型电路》.pdf

1、SMD-59b2-94550 = b O078682 891 W LTR DESCRIPTION DATE (YR-MO-DA) APmw REV SrATuS OF FMIC N/A REV SHEEC 123 PREPARED BY I Larry T. Gauder SIZE A CHECKED BY Thomas M. Hess STANDARD MICROCIRCUIT DRAWING CAGE OODE 5962-94550 67268 APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGEN

2、CIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95 - 06- 30 AMSC N/A REVICICN LEVEL r DEFENSE nCS SUPPLY CENTER mm, OHIO 45444 MICROCIRCUIT, DIGITAL, 32-BIT RISC MICROPROCESSOR, MONOLITHIC SILICON I iESC FORM 193 JUC 94 DISTRIBUTION STATEMENT A. Approved for public release; distribution is u

3、nlimited. 5962-E202-95 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94550 9999b 0078683 728 I STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1.1 Scope. This drawing forms a part of a one part - one part

4、 nunber docunentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes and U) and space application (device class VI, and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nunber (PIN).

5、 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-8-33 in conjunction with compliant non-JAN devices1. available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. Device class M microcircuits represent non-JAN class B microcircuits in accordance with Uhen 1.2 p

6、Iw. lhe PIN shall be as shown in the following exanple: 94550 Federal R HA k?if Device Device Case Lead 11 stock class designator type class out 1 ine finish designator (see 1.2.1) (see 1.2.2) des i gnator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing mmber 1.2.1 RHA desianator. Device class M RHA

7、 marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. MiL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. non-RHA device. Device classes O and V RHA marked devices shall meet the A das

8、h (-) indicates a 1.2.2 Device tvriecs). lhe device type(s) shall identify the circuit function as follows: 5962-94550 SI SE A ms1ONLEvEL SHEET 2 Device tym o1 Generic nimber 79113081 E Circuit function 32-bit RISC microprocessor 1.2.3 Device class designator. The device class designator shall be a

9、single letter identifying the product assurance level as fol lows: Device class Devi ce reaui rements docunentat i on I M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883 a or v Certification and qualification to MIL-1-38535 1.2.

10、4 Case outline(s1. The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline Letter Descriptive designator Terminals Packaae style X See figure 1 84 Quad flat pack 1.2.5 Lead finish. lhe lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-1-3

11、8535 for classes O and V. designation is for use in specifications when lead finishes A, E, and C are considered acceptable and interchangeable without preference. Finish letter llX1l shall not be marked on the microcircuit or its packaging. The B1X18 t- DESC FORM 193A JULI 94 Provided by IHSNot for

12、 ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-94550 A RESASION LEVEL SHEET 3 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SM

13、D-5762-94550 9999996 O078685 5T0 - I STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 3. REPUIREMENTC 3.1 Item requirements. lhe individual item requirements for device class M shall be in accordance with 1.2.1 of MIL-CTD-883, “Provisions for the use of MIL-STD-883

14、in conjunction uith compliant non-JAN devices“ and as specified herein. device manufacturers Puality Management (PMI plan, and as specified herein. lhe individual item requirements for device classes P and V shall be in accordance uith MIL-1-38535, the 3.2 Design. construction, and physical dimensio

15、ns. lhe design, construction, and physical dimensions shall be as specified in MIL-STO-883 (see 3.1 herein) for device class M and MIL-1-38535 for device classes P and V and herein. 3.2.1 3.2.2 Terminal connections. Case outline(s2. lhe case outline(s) shall be in accordance with 1.2.4 herein and fi

16、gure 1. lhe terminal connections shall be as specified on figure 2. SIZE 5962-94550 A REVISION LEVEL SHEET 4 I 3.2.3 Block diaciram. lhe block diagram shall be as specified on figure 3. m 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-74

17、550 9779776 0078686 Y37 H Conditions I/ -55OC 5 TC 5 +12SC unless otherwise specified ee figure 4 ICC = 4.5 v Symbol t 1 tl.3 t2 t2a t3 tk t5 t6 t7 ta t9 tl0 tll Group A subgroups STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 9,10,11 SIZE 5962-94550 A FZEVISIONLE

18、VEL SHEET 6 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 9,10,11 Jevice type 01 01 01 01 01 01 01 01 01 01 01 01 01 Limits Unit i 4 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAND

19、ARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-94550 A ms1ONLEvEL SHEm! 7 c TABLE I. Electrical performance characteristics - Continued. Test Conditions I/ -55C 5 TC 5 +125C 4.5 v 5 vcc 5 5.5 v unless otherwise specified Group A subgroups levice tVPe Limits U

20、nit Min I Max o1 9,10,11 ns Asserted from A/D three- state I/ iee figure 4 /cc = 4.5 v tlL 9,10,11 o1 OI Driven from SysClk rising z/ ns 9,10,11 ns Negated from SysClk talking o1 o1 o1 t15 t16 t17 9,10,11 ns Valid frm SysClk 9,10,11 Valid from SysClk ns 9,10,11 O1 t18 ns Three-state from SysClk fall

21、ing 9,10,11 SysCLk falling to data out ns o1 o1 t19 t20 9,10,11 ns Pulse uidth high 9,10,11 Pulse width low Clock period Pulse uidth from VCC valid ns t21 t22 t23 9,10,11 + ns 9,10,11 ns Yinimun pulse uidth 9,10,11 o1 ns t24 9,10,11 o1 Set-up to SysClk falling ns 5 t25 See footnotes at end of table.

22、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-b SflD-5962-94550 9999996 0078689 Li.16 m TABLE I. Electrical performance characteristics - Continued. Test - Mode Set-up to Reset rising - Mode hold from Reset rising Set-up to SysClk falling Holding

23、from SysCtk falling Set-up to SysCik failing Hold from SysClk falling Pulse uidth o/ Clock high time o/ Clock Lou time o/ Pulse uidth o/ Ciock high time o/ Clock low time o/ See footnotes at end of table. 5962-94550 STANDARD SIZE MICROCIRCUIT DRAWING A DAYTON, OHIO 45444 REViSION LEVEL sHEE!T DEFENS

24、E ELECTRONICS SUPPLY CENTER 8 DECC FORM 193A m 94 4 Group A subgroups Limits I Unit Conditions I/ -55C 5 TC 5 +125C 4.5 v 5 vcc s 5.5 v unless otherwise specified Device type Hin 1 Max 26 See figure 4 icc = 4.5 v 9,10,11 ns I o1 o1 o1 ns t27 9,10,11 28 9,10,ll 5 29 9,10,11 o1 ns 3 t30 9,10,11 ns o1

25、O1 o1 o1 o1 5 t31 9,10,11 ns 3 tsys 9,10,11 ns I t22-2 t22+2 t32 9,10,11 t33 ns tsys/2 9,10,11 o1 ns t34 9,10,11 o1 ns t35 9,10,11 ns o1 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-5q62-94550 9999996 0078690 968 = TABLE I. Electrical performa

26、nce characteristics - Continued. Min Max 8 2 ns ns STANDARD SIZE MICROCIRCUIT DRAWING A DAYTON, OHIO 45444 REVISION LEVEL DEFENSE ELECTRONICS SUPPLY CENTER 5962-94550 SHEET 9 c Test Conditions I/ -55C 5 Tc 5 +125“C 4.5 v 5 vcc 5 5.5 v unless otherwise specified Group A subgroups ,evite type Limits u

27、nit 9,10,11 t36 ;ee figure 4 fcc = 4.5 v o1 o1 o1 o1 o1 Set-up to SysClk falling 9,lO, 11 t37 Hold from SysClk falling Set-up to ALE falling 38 9,10,11 Hold from Ale falling 9,10,11 9,10,11 Set-up to SysClk rising t40 t41 9,10,11 o1 Hold from SysClk rising 9,10,11 o1 t42 Pulse uidth high I/ Pulse ui

28、dth Lou I/ 9.10.11 t43 o1 o1 o1 Clock period t44 9,10,11 tdera t e 9,10,11 Timing deration for loading over CLD z/l / I INIERNU INVALIOATC AOORESS STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 ClSR MORO INVALIOATION 5962-94550 SIZE A REVISION LEVEL SHEFT 23 EN0 O

29、F COHERENT URITE OIAGllOl - RD ALE lim BURST/ =l=EEEE EN0 Of COHERENT OMA REOUEST FIGURE 4. Timing uaveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-4. PUALITY ASSURANCE PROVISIONS 4.1 Samlins and insmction. For device class M, s

30、ampling and inspection procedures shall be in accordance with For device classes a and V, sanpling and inspection procedures shall be in accordance MIL-STD-883 (see 3.1 herein). with MIL-1-38535 and the device manufacturers pn plan. 4.2 Screening. for device class M, screening shall be in accordance

31、 with method 5004 of MIL-STD-883, and shall be cwducted on all devices prior to quelity conformance inspection. for device classes a and V, screening shall be in accordance with MIL-1-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. STANDARD

32、MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1 4.2.1 Additional criteria for device class M. SIZE 5962-94550 A REVISIONLEVEL SHEET 24 I a. Burn-in test, method 1015 of MIL-STD-883. (1) lest condition A, B, C, or D. lhe test circuit shall be maintained by the manufacturer

33、 under docunent revision level control and shall be made available to the preparing or acquiring activity upon request. lhe test circuit shall specify the irputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA = +125“C, mini

34、m. b. Interim and final electrical test parameters shall be as specified in table II herein. I I 4.2.2 Additional criteria for device classes Q and V. a. lhe burn-in test duration, test condition and test teniperature, or approved alternatives shall be as specified in the device manufacturers Pn pla

35、n in accordance with MIL-1-38535, maintained under docwnt revision level control of the device manufacturers Technology Revieu Board (TRB) in accordance with MIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. lhe test circuit shall specify the inputs, output

36、s, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. Interim and final electrical test parameters shall be as specified in table II herein. Additional screening for device class V beyond the requirements of device class shall be as specified i

37、n appendix B of MIL-1-38535. be in accordance with MIL-1-38535. groups A, 6, C, D, and E inspections (see 4.4.1 through 4.4.4). MIL-STD-883 (see 3.1 herein) and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for g

38、roups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). Technology conformance inspection for classes and V shall be in accordance with MIL-1-38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-1-38535 permits alternate in-line control tes

39、t i ng . lhe turn-in test circuit shall be b. c. 4.3 ualification inswction for device classes p and V. ualification inspection for device classes O and V shall Inspections to be performed shall be those specified in MIL-1-38535 and herein for 4.4 Conformance inspection. Quality conformance inspecti

40、on for device class M shall be in accordance with 4.4.1 Grow A inspection. a. b. lests shall be as specified in table Il herein. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the functionality of the device. for device classes Q and V, subgroups 7 and 8 shall include veri

41、fying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). Subgroup 4 (GIN and Cw measurements) shall be measured only for the initial test and after process or design changes which may affect input capacitance.

42、A miniinun sanple size of 5 devices with zero rejects shall be required. c. DECC FDRM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-596Z-9Y55O 9999996 0078706 O55 TABLE II. Electrical test requirements. Test requirements Subgroups C

43、ubg r oups (in accordance uith MIL-STO-883, TM 5005, tabke 111) table I) (in accordance with MIL-1-38535, I Device class M Device class Q I Device class V Final electrical parameters (see 4.2) Group A test requirements (see 4.4) parameters (see 4.4) Group C end-point electrical I Interim electrical

44、parameters I (see 4.2) 1,2,3,7,8,9,10,11 1,2,3,7,8,9,10,11 1,2,3,7,8,9,10,11 11 - 1/ - 2/ 1,2,3,4,7,8,9,10,11 1,2,3,4,7,8,9,10,11 1,2,3,4,7,8,9,10,11 1,7,9 1,2,3,4,7,8,9,10,11 1,2,3,4,7,8,9,10,11 Group D end-point electrical I parameters (see 4.4) Group E end-point electrical I parameters (see 4.4)

45、1 - I- -_ - 1/ PDA applies to subgroup 1. - 2/ PDA applies to subgroups 1 and 7. Additional criteria for device class M. 4.4.2.1 Steady-state Life test conditions, method 1005 of MIL-STD-883: a. Test condition A, E, C, or D. lhe test circuit shall be maintained by the manufacturer under docunent rev

46、ision level control and shall be made available to the preparing or acquiring activity upon request. test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005. lhe b. TA = +125“C, minim. C. lest duration:

47、 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and :est temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance rith MIL

48、-1-38535. ianufacturers TRB, in accordance uith MIL-1-38535, and shall be made available to the acquiring or preparing activity pon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in iccordance with the intent specified in test method 1005.

49、The test circuit shall be maintained under docunent revision level control by the device 4.4.3 Group D inswction. The group D inspection end-point electrical parameters shall be as specified in table II ierein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation iardness assured (see 3.5 herein). RHA levels