DLA SMD-5962-94608 REV A-2009 MICROCIRCUIT DIGITAL CMOS 12-BIT CASCADABLE MULTIPLIER-SUMMER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct test circuit on figure 2. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-07-23 Thomas M. Hess REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14

2、 PMIC N/A PREPARED BY Thomas M. Hess DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Thomas M. Hess APPROVED BY Monica L. Poelking M

3、ICROCIRCUIT, DIGITAL, CMOS, 12-BIT CASCADABLE MULTIPLIER-SUMMER, MONOLITHIC SILICON DRAWING APPROVAL DATE 94-07-28 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94608 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E412-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without

4、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q

5、 and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the foll

6、owing example: 5962 - 94608 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Leadfinish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF

7、-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s

8、) identify the circuit function as follows: Device type Generic number Circuit function Speed 01 LMS12 12 X 12 Multiplier 65 ns 02 LMS12 12 X 12 Multiplier 50 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device c

9、lass Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as

10、 designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA15-P84 84 Pin grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot

11、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ VCCsupply voltage with respect to gr

12、ound range . -0.5 V dc to +7.0 V dc Input signal with respect to ground range -3.0 V dc to +7.0 V dc Signal applied to high impedance output range . -0.3 V dc to + 7.0 V dc Output current into low outputs 25 mA Latch-up current . 400 mA Thermal resistance junction-to-case (JC) See MIL-STD-1835 Junct

13、ion temperature (TJ) 175C Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) 300C Power dissipation (PD) . 1.2 W 1.4 Recommended operating conditions. Supply voltage range . 4.50 V dc to 5.50 V dc Operating ambient temperature range . -55C to +125C 2. APPLICABLE DOCUMEN

14、TS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENS

15、E SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List o

16、f Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of prec

17、edence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolut

18、e maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94608 DEFENS

19、E SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufact

20、urers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.

21、2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline shall be in accordance w

22、ith 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Output load circuit. The output load circuit shall be as specified on figure 2. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. 3.25 Input/output formats. The inp

23、ut/output formats shall be as specified on figure 4. 3.2.6 Timing waveforms. The timing waveforms shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post

24、irradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5

25、 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For

26、 RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for de

27、vice classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed

28、manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submit

29、ted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificat

30、e of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, not

31、ification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review th

32、e manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see M

33、IL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical per

34、formance characteristics. Test Symbol Test conditions 1/ -55C TA +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device type Limits Units Min Max Output high voltage VOHVCC= Min, IOH= -2.0 mA 1,2,3 All 3.5 V Output low voltage VOLVCC= Min, IOL= 4.0 mA 0.5 V Input high voltage VIH2

35、.0VCCV Input low voltage VIL2/ 0.0 0.8Input current IIXGroup VIN VCC3/ 2 20 A Output leakage current IOZGroup VOUT VCC3/ 20 A VCCcurrent, dynamic ICC14/ 5/ 1,2,3 25 mA VCCcurrent, quiescent ICC26/ 1.0 Capacitance test CINSee 4.4.1c 4 All 10 pF Functional testing See 4.4.1b 7,8 All Clock period tCPVC

36、C= 4.5 V See figure 5 7/ 8/ 9,10,11 01 40 ns 02 35 Clock pulse width tPW01 15 ns 02 15 A, B, data set-up time tSAB01 15 ns 02 15 C data set-up time tSC01 15 ns 02 15 ENA, ENB, ENC set-up time tSEN01 15 ns 02 15 A, B, data hold time tHAB01 5 ns 02 5 C data hold time tHC01 5 ns 02 5 ENA, ENB, ENC hold

37、 time tHEN01 5 ns 02 5 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94608 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR

38、 97 TABLE I. Electrical performance characteristics- Continued. Test Symbol Test conditions 1/ -55C TA +125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Devices type Limits Units Min Max Clock to S-FT = 1 tDVCC= 4.5 V See figure 5 7/ 8/ 9,10,11 01 50 ns 02 45 Clock to S-FT = 0 tD01

39、25 ns 02 25 Three-state output enable delay 9/ tENA01 22 ns 02 22 Three-state output disable delay 9/ tDIS 01 22 ns 02 22 1/ All testing to be performed using worst-case test conditions unless otherwise specified. 2/ This device provides hard clamping of transient undershoot and overshoot. Input lev

40、els below ground or above VCCwill be clamped beginning at -0.6 V and VCC+ 0.6 V. 3/ These parameters are only tested at the high temperature extreme, which is the worst case for leakage current. 4/ Supply current for a given application can be accurately approximated by: NCV2F 4 N = total number of

41、device outputs C = capacitive load per output V = supply voltage F = clock frequency 5/ Tested with all outputs changing every cycle and no load, at a 5 MHz clock rate. 6/ Tested with all inputs within 0.1 V of VCCor ground, no load. 7/ AC specifications are tested with input transitions times less

42、than 3 ns output reference levels of 1.5 V (except tENA/tDIStest), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOHand IOLat an output voltage of VOHmin and VOLmax respectively. Alternatively, a diode bridge with upper and lower cur

43、rent sources of IOHand IOLrespectively, and balancing voltage of 1.5 V may be used. Parasitic capacitance is 30 pF minimum, and may be distributed. For tENABLEand tDISABLEmeasurements, the load current is increased to 10 mA to reduce the RC delay component of the measurement. A 0.1 F ceramic capacit

44、or should be installed between VCCand ground leads as close to the device under test as possible. Similar capacitors should be installed between device VCCand the tester common, and device ground tester common. 8/ Each parameter is shown as a minimum or maximum value. Input requirements are specifie

45、d from the point of view of the external system driving the chip. 9/ Transition is measured 200 mV from steady-state voltage with specified loading. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94608 DEFEN

46、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01, 02 Device type 01, 02 Device type 01, 02 Device type 01, 02 Device type 01, 02 Case outline X Case outline X Case outline X Case outline X Case outline X Terminal number Terminal symbol

47、 Terminal number Terminal symbol Terminal number Terminal symbol Terminal number Terminal symbol Terminal number Terminal symbol A1 B1C4 - E7 - G10 C17K2 S19A2 ENA C5 A5E8 - G11 C16K3 S18A3 A11C6 A4E9 C13H1 S22K4 S15A4 A9C7 A0E10 C11H2 S21K5 S12A5 A6C8 - E11 C12H3 - K6 S13A6 A8C9 F1 ENB H4 - K7 S6A7

48、 A2C10 C5F2 B7H5 - K8 S3A8 ENC C11 C7F3 B11H6 - K9 S0A9 C1D1 B6F4 - H7 - K10 C24A10 C2D2 B5F5 - H8 - K11 C22A11 GND D3 - F6 - H9 - L1 VCCB1 B4D4 - F7 - H10 C20L2 S17B2 B2D5 - F8 - H11 C19L3 S16B3 B0D6 - F9 C14J1 S20L4 S14B4 A10D7 - F10 C15J2 FTS L5 S11B5 A7D8 - F11 C10J3 - L6 S8B6 A3D9 - G1 S25J4 - L7 S7B7 A1D10 C8G2 S24J5 S10L8 S4B8 C0D11 C9G3 S23J6 S9L9 S2B9 C3E1 B9G4 - J7 S5L10 S1B10 C4E2 B8G5 - J8 - L11 C25B11 C6E3 B10G6 - J9 - C1 CLK