DLA SMD-5962-94686 REV A-2001 MICROCIRCUIT LINEAR A D CONVERTER 12-BIT 5 MSPS MONOLITHIC SILICON《12-BIT 5 MSPS交流电和交流电转换器硅单片电路线型微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. -rrp 01-12-06 R. MONNIN REV SHET REV SHET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Sandra B. Rooney DEFENSE SUPPLY CENTER COLUMBUS STANDARD

2、MICROCIRCUIT DRAWING CHECKED BY Sandra Rooney COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, A/D CONVERTER, 12-BIT, 5 MSPS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVA

3、L DATE 94-07-25 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94686 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E118-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

4、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space

5、application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 59

6、62 - 94686 01 M X X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified

7、 RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the c

8、ircuit function as follows: Device type Generic number Circuit function 01 AD871SD 12-Bit A/D Converter 02 AD871SE 12-Bit A/D Converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements d

9、ocumentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-183

10、5 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line Y CQCC1-N44 44 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device

11、class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ AVDDto A

12、GND . -0.5 V to +6.5 V AVSSto AGND . -6.5 V to +0.5 V DVDD, DRVDDto DGND, DRGND 2/ . -0.5 V to +6.5 V DRVDDto DVDD2/ . -6.5 V to +6.5 V DRGND to DGND 2/ . -0.3 V to +0.3 V AGND to DGND -1 V to +1 V AVDDto DVDD. -6.5 V to +6.5 V Clock input, OEN to DGND 2/ -0.5 V to DVDD+ 0.5 V Digital outputs to DGN

13、D -0.5 V to DVDD+ 0.3 V REFIN to AGND AVSSto AVDDVINA, VINB, REFIN to AGND . -6.5 V to +6.5 V Power dissipation (PD) . 1.3 W Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA): Case outline X . 60C/W Case outline Y . 70C/W Storage temperature rang

14、e . -65C to +150C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. Operating temperature range (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

15、of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE M

16、IL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microc

17、ircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute

18、 maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ DRVDD, DRGND, and OEN are applicable only to device type 02. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

19、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this draw

20、ing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as speci

21、fied herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN

22、class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outl

23、ine(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance

24、 characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup

25、 are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has th

26、e option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certif

27、ication/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of

28、 compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (s

29、ee 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements o

30、f MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification

31、 of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DS

32、CCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices cove

33、red by this drawing shall be in microcircuit group number 93 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVI

34、SION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Resolution RES 1,2,3 01,02 12 Bits Differential nonlinearity 3/ DNL All codes histogram

35、1,2,3 01,02 12 Bits Zero error BPOETA= +25C 1 01,02 0.75 %FSR Gain error AETA= +25C 1 01,02 1.25 %FSR Zero error drift TCBPOEExternal 2.5 V reference, TA= +125C, -55C 2,3 01,02 0.30 %FSR TCAINTInternal 2.5 V reference, TA= +125C, -55C 1.75 Gain error drift TCAEXTExternal 2.5 V reference, TA= +125C,

36、-55C 2,3 01,02 0.5 %FSR Power supply rejection PSRR 4/ 1,2,3 01,02 0.125 %FSR Analog input ranges VIN1,2,3 01,02 1 V Internal reference output voltage VREF1,2,3 01,02 2.46 2.54 V Power dissipation PD1,2,3 01,02 1.3 W IAVDD88 IAVSS150 IDVDD01,02 21 Power supply current IDRVDD1,2,3 02 2 mA Signal-to-n

37、oise and distortion ratio S/(N+D) fIN= 1 MHz; fS= 5 MHz 1,2,3 01,02 62 dB Total harmonic distortion THD fIN= 1 MHz; fS= 5 MHz 1,2,3 01,02 -63 dB Logic input high voltage VIH1,2,3 01,02 2.0 V Logic input low voltage VIL1,2,3 01,02 0.8 V Logic input high current (CLK) 01 10 Logic input high current (O

38、EN, CLK) IIH1,2,3 02 10 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 6 DSCC FORM 2234

39、APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits 2/ Unit Min Max Logic input low current (CLK) 01 10 Logic input low current (OEN, CLK) IIL1,2,3 02 10 A Logic output high voltage

40、( MSB -Bit 12, OTR) VOHISOURCE= 500 A 1,2,3 01,02 2.4 V Logic output low voltage ( MSB -Bit 12, OTR) VOLISINK= 1.6 mA 1,2,3 01,02 0.4 V Leakage IZThree-state 1,2,3 02 10 A Clock period tCDuty cycle = 50%, See figure 2 9,10,11 01,02 200 ns Output delay tODSee figure 2 9,10,11 01,02 10 ns 1/ Unless ot

41、herwise specified, AVDD= +5 V, AVSS= -5 V, DVDD= +5 V, and DRVDD= +5 V. 2/ The limiting term “min” (minimum) and “max” (maximum) shall be considered to apply to magnitudes only. Negative current shall be defined as conventional current flow out of a device terminal. 3/ Minimum resolution for which “

42、no missing codes” is guaranteed. 4/ Test conditions for PSRR: 4.75 V AVDD 5.25 V, -5.25 V AVSS -4.75 V, 4.75 V DVDD 5.25 V. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modi

43、fied in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device clas

44、ses Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to q

45、uality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition B. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring act

46、ivity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. Provide

47、d by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94686 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device types 01 02 Case outline X Y Terminal number Termi

48、nal symbol 1 VINAVINA2 VINB INB3 AVSSNC 4 AVDDNC 5 AGND AVSS6 DGND AVDD7 DVDDNC 8 BIT 12 (LSB) NC 9 BIT 11 AGND10 BIT 10 DGND 11 BIT 9 DRGND 12 BIT 8 DRVDD13 BIT 7 OEN14 BIT 6 NC 15 BIT 5 NC16 BIT 4 BIT 12 (LSB) 17 BIT 3 BIT 11 18 BIT 2 BIT 10 19 MSB BIT 9 20 OTR BIT 8 21 CLK BIT 7 22 DVDDBIT 6 23 DGND BIT 524 AGND BIT 4 25 AVSSBIT 3 26 REF OUT BIT 2 27 REF GND MSB 28 REF IN NC 29 - MSB 30 - OTR 31 - CLK 32 - DRVDD33 - DVDD34 - DRGND 35 - NC 36 - AGND 37 - NC 38 - AVDD39 - NC 40 - AVSS41 - REF OUT 42 - REF GND 43 -