DLA SMD-5962-94688 REV A-1996 MICROCIRCUIT MEMORY DIGITAL CMOS PROGRAMMABLE LOGIC DEVICE MONOLITHIC SILICON《数字互补金属氧化物可编程逻辑装置硅单片电路线型微电路》.pdf

1、SMD-5962-94688 REV A = 999999b 0090L38 748 DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER COLUMBUS 3990 BROAD STREET COLUMBUS, OH 43216-5000 IN REPLY REFER TO: DSCC-VAS (Mr. K Rice/(DSN)850-0534/614-692-0534/ksr) OCT29 a96 SUBJECT: Notice of Revision (NOR) 5962-ROO1-97 for Standard Microcircuit Draw

2、ing _. (SMD) 5962-94688 Military/Industry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIGSTD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR shoul

3、d be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active current c

4、ertificate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. If you have comments or questions, please contact Ken Rice at (DSN)850-0534/(614)692-

5、0534. 1 Encl RAI MONNIN Chief, Microelectronics Team Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94b8 REV A W 9999996 0090139 684 = b. ADDRESS (Street, City, State, Zip Code) 5. CAGE CODE . ORIGINATOR Defense Supply Center Columbus 67268

6、 3990 Broad Street Columbus,OH 43216-5000 Last) 67268 . TYPED NAME (First, Middle lnifial, 7. CAGE CODE l. TITLE OF DOCUMENT IO. REVISION LETTER a. CURRENT )EVICE, MONOLITHIC SILICON b. NEW MICROCIRCUIT, MEMORY, DIGITAL CMOS, PROGRAMMABLE LOGIC A Fom Approved OM6 NO. 0704-0188 I 1. DATE (YYMMDD) 96-

7、10-04 I NOTICE OF REVISION (NOR) THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. 6. NOR NO. 5962-ROO1 -97 8. DOCUMENT NO. 5962-94688 Il. ECP NO. ublic reDorna burden forthis collection is edmated lo averaae 2 hours Der resoonse. indudinn the time for mviewina instructions.

8、 saarchina existina data (_PROCURING J. ACTIVITY AUTHORIZED TO APPROVE CHANGE FOR GOVERNMENT DSCC-VAS ACTIVITY NO. LEASE DO rsb-r RETURN v8uk CBMPLETED FORM TO EITLER OF “Maxinun frequency with external feedback“ (fMAX3) for device type 02 change the Min limit from 67.5 to 62.5. e. SIGNATURE f. DATE

9、 SIGNED (YYMMDD) Ray Monnin 96-1 0-04 b. REVISION COMPLETED (Signature) c. DATE SIGNED (YYMMDD) Kenneth S. Rice 96-1 0-04 Revision level block; add llA1l. 14. THIS SECTION FOR GOVERNMENT USE ONLY X (1) Existing document supplemented by the NOR may be used in manufacture. (2) Revised document must be

10、 received before manufacturer may incorporate this change. a Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5762-94bBB 9999996 00BbOb TBb H LTR REVISIONS DESCRIPTION DATE (YR-MO-DA) APPROVED PREPAREDBY Kenneth Rice PMIC NIA CHECKED BY STANDARD

11、MICROCIRCUIT Jeff Bowling DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA I I SHEET 1 OF 18 MICROCIRCUIT, MEMORY DIGITAL PROGRAMMABLE LOGIC DEVICE, MONOLITHIC SILICON APPROVEDBY CMOS

12、ELECTRICALLY ALfERABLE FLASH MichaelA Frye DRAWING APPROVAL DATE 96-03-1 4 5962-94688 SIZE CAGE CODE REVISION LEVEL A 67268 5962-E275-96 JUL 94 DISTRIBUTION STATEMENT A Approved for public release, distribution is unlimited Provided by IHSNot for ResaleNo reproduction or networking permitted without

13、 license from IHS-,-,-SMD-59b2-94b88 9999996 0086070 7T8 SIZE A STANDARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 1. SCOPE 1.1 m. This drawing docunents two product assurance class levels consisting of high reliability (device classes A choice of case outlines and Lead

14、finishes are available and arc When available, a choice of Radiation Hardness Assurance (RHA) levels Q and M) and space application (device class V). reflected in the Part or Identifying N-r (PIN). are reflected in the PIN. 1.2 PIN. The PIN is be as shown in the following example: Federal R HA 1111

15、Device Device Case Lead 1 1 94688 stock class designator type class out l ine finish designator (1.2.1) (See 1.2.2) designator (See 1.2.4) (See 1.2.5) Ld (See 1.2.3) / Drawing nunber . 1.2.1 Device classes P and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the

16、 appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-1 indicates a non-RHA device. 1.2.2 Device tweCQ . The device typeCs) shall identify the circuit function as follows: De

17、vice woe Generic Circuit function Tossle Smed (Mhu 5962-94688 REVISION LEVEL SHEET 2 o1 02 7C372 7C372 64 Macrocell CPLD 64 Macrocell CPLD 66 83 . The device class designator is a single letter identifying the product assurance level as folious: Device r-ntatiw M Verdor self-certification to the req

18、uirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A P or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlinetsl. The case outline(s) are as designated in MIL-STD-1835 and as follows: Qutline letter pescriDtive desisn

19、ator Terminals Packase stv le X GPCCl- J44 44 J leaded chip carrier lhe lead finish is as specified in MIL-PRF-38535 for device classes P and V or 1.2.5 MIL-PRF-3kg38t,fa these tests shall have been fault graded in accordance uith MIL-STD-883, test method 5012 (see 1.5 herein). d. O/V (latch-up) tes

20、ts shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. For device class M procedures and circuits shall be maintained under docunent revision level control by the manufacturer and shall be made available to the prep

21、aring activity or acquiring activity upon request. For device classes P and V, the procedures and circuits shall be under the control of the device manufacturers technical review board (TRB) in accordance uith MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity

22、upon request. Testing shall be on all pins, on 5 devices uith zero failures. Latch-up test shall be considered destructive. Subgroup 4 (CIy and CwT measurements) shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Cap

23、acitance shall be measured betueen the designated terminal and GND at a frequency of 1 MHz. Sample size is three devices uith no failures, and all input and output terminals tested. The group C inspection end-point electrical parameters shall be as specified in table II ierein. Delta limits shall ap

24、ply only to subgroup 1 of group C inspection and shall consist of tests specified in tab1 IIB herein. Information contained in JEDEC Standard nunber 17 may be used for reference. e. 4.4.2 Grow C inswct iq. 4.4.2.1 hdd itional criteria for device class M . Steady-state life test conditions, method 10

25、05 of MIL-CTD-883: a. Test condition D. For device class M, the test circuit shall be maintained by the manufacturer under docuoer revision level controi and shall be made available to the preparing or acquiring activity upon request. Fc device classes M the test circuit shall specify the inputs, ou

26、tpits, biases, and power dissipation, as applicable in accordance with the intent specified in test method 1005. b. TA = +125“C, minim. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING 5962-94688 I DESC FORM 193A JUL 94 Provided by IHSNo

27、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-5b2-94b88 m b O086078 T77 Case outline X Device type Termi na 1 nunber 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 All Terminal symbol GND I /O I /O I /O I /O I /o I /o I /o I /O i I GND CLKO/ I I /o I

28、/O I /O I /o I /O I /o 1 /o I /o vcc Device type Terminal nuber 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 FIGURE 1. Terminal connections. Al I Termina I symbol GND I /O I /o I /o I /o I /O I /O I /o I /o I I GND CLK/ I 1 /o I /o i $8 I /O I /O I /o I /o vcc JUL 94 Provided by

29、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SND-5962-94b8 9999996 0086079 925 M Input pins I/CLK I X X Output pins I /O 2 NOTES: 1. X = Dont care 2. 2 High imedance FIGURE 2. Jruth tu tunoroare. OUTPUT o T 4 SEE NOTE - 3ign UTPUT A STANDARD MICROCIRCUIT DR

30、AWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SEE 35 pF T 5962-94688 REVISION LEVEL SHEET il CIRCUIT A OUTPUT LOAD i 236n (tEAandtER) OUTPUT LOAD THEVENIN EOUIVALENT 136a O 02.13 V NOTE: INCLUDING SCOPE AND JIG IHINIHUH VALUES FIGURE 3. OutDut Load circuits and test conditions. 1 SIZE I

31、 I DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SND-5962-94b88 9999996 0086080 bY7 ARAHETEI LERI-l LEAI-I - VX - 1.5 V 2.6 V - 1.5 V - thc Test WaveQomis OUIPUT UAVEFORH - HEASUREMNT LEVEL /DL +A- 0.5 V vx 5.0 Y lox i CND 52

32、 ns i input pulses 9ox 1, ,ox FIGURE 3. OutDut load circuits and test conditions - Continued. I SIZE I I 5962-94688 REVISION LEVEL SHEET STANDARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking pe

33、rmitted without license from IHS-,-,-SMD-59b2-94b8 - 9999996 OOBbOBL 583 SIZE A STANDARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 INPUT 5962-94688 REVISION LEVEL SHEET 13 COMBINATORIAL OUTPUT INPUT CLOCK REGISTERED OUTPUT CLOCK INPUT LATCH ENABLE LATCHED OUTPUT COMBINAT

34、ORIAL OUTPUT REGISTERED OUTPUT LATCHED OUTPUT FIGURE 4. Switchinq waveforms. I I 1 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-REGISTERED INPU1 REGISTERED INPUT 1 tIH INPUT REGISTER CLOCK t IC0 COMBINATORIAL OUTPUT CLOCK CLO

35、CK TO CLOCK REGISTEREO INPUT INPUT REGISTER CLOCK f t ICs OUTPUT REGISTER CLOCK LATCHED INPUT LATCHED INPUT LATCH ENABLE - COMBINATORIAL OUTPUT LATCH ENABLE FIGURE 4. Switchins waveforms - Continued. JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

36、-,-,-SND-59b2-94b88 m b 008b083 356 m LATCHED INPUT AND OUTPUT LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCHED ENABLE ASYNCHRONOUS RESET INPUT REGISTERED INPUT c CLOCK FIGURE 4. Suitchins uaveforma - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENT

37、ER DAYTON, OHIO 45444 5962-94688 REVISION LEVEL SHEET I I I 15 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SUD-5762-94688 W 9799996 0086084 292 W I I INPUT 16 REGISTERED INPUT CLOCK POWER SUPPLY VOLTAGE REGISTERED ACTIVE LOW

38、 OUTPUTS CLOCK ASYNCHRONOUS PRESET t- tpw rt tpo -y POWER-UP RESET WAVEFORM OUTPUT ENABLE/DISAELE INPUT OUTPUTS FIGURE 4. Cwitchinq waveforms - Continued. VC C 5962-94688 REVISION LEVEL SHEET STAN DARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 Provided by IHSNot for Resa

39、leNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-94b88 999999b 008b085 129 W Line no. TABLE IIA. Electrical test reauirmntg * uvi/!du/4/u Subgroups (in accordance Subgroups uith MIL-STD-883, (in accordance with Test method 5005. table I) - table III) requirements Devic

40、e Device Device class M class Q class V 2 interim electrical parameters (see 4.2) I Not Not Static burn-in Required Required Required (method 1015) or Parameter 1/ Io2 Device tmes Al 1 f 10% of the specified value in table i Blank spaces indicate tests are not applicable. * indicates PDA applies to

41、subgroup 1 and i. * see 4.4.le. Any or all subgroups my be combined when using high-speed testers. Subgroups 7 and 8 functional tests shall verify the truth table. A indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed uith reference to the

42、previous interim electrical parameters (see line 1). See 4.4.ld. i 10% of the specified value in table I IIX 4 I 1 1/ lhe above parameter shall be recorded before and after the required burn-in and life tests to determine the delta A. 5962-94688 REVISION LEVEL SHEET STANDARD MICROCIRCUIT DRAWING DEF

43、ENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 t I I DESC FORM 193A JUL 94 - . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- 4.4.2.2 pdditional cr iteria for &vice classes P and I . The steady-state life test duration, test condition and tes1 tenp

44、erature, or approved alternatives shall be as specified in the device manufacturers PM plan in accordance with MIL- PRF-38535. The test circuit shall be maintained under docunent revision level control by the device manufacturers TRf in accordance with MIL-PRF-38535 and shall be made available to th

45、e acquiring or preparing activity upon request. Thc test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with tht intent specified in test method 1005 of MIL-STD-883. I herein. 4.4.3 Crom D imtioq . . The group D inspection end-point electrical

46、parameters shall be as specified in table II/ 4.4.4 Uocp E insoect ion. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). RHA levels for device classes Q and V shall be M, D, 1, R, F, G, and H and for device class M shall be M and D.

47、a. b. End-point electrical parameters shall be as specified in table IIA herein. For device classes CI and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subj

48、ected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes mist meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25T 15“c, after exposure, to the subgroups specified in table IIA herein. Uhen specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. c. 4.5 pelta measurements for device class y . Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens