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本文(DLA SMD-5962-94698 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH 18-BIT BUS TRANSCEIVER AND REGISTER THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS MON.pdf)为本站会员(diecharacter305)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-94698 REV A-2009 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH 18-BIT BUS TRANSCEIVER AND REGISTER THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS MON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements of MIL-PRF-38535. MAA 09-01-08 Charles F. Saffle REV SHEET REV A A A A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SH

2、EET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND A

3、GENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-02-09 MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, SCAN TEST DEVICE WITH 18-BIT BUS TRANSCEIVER AND REGISTER, THREE-STATE OUTPUTS AND TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94698 S

4、HEET 1 OF 29 DSCC FORM 2233 APR 97 5962-E111-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94698 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1.

5、 SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When availa

6、ble, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94698 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2)Deviceclass designatorCaseoutline (see 1.2.4)Lead finish (s

7、ee 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are m

8、arked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ABT18646 Scan test device with 18-bit bus transceiver and register, three-state output

9、s and TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level

10、B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 68 Quad flat

11、pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94698 DEFEN

12、SE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC). -0.5 V dc to +7.0 V dc DC input voltage range (I/O ports) (VIN) -0.5 V dc to +5.5 V dc 4/ DC input voltage range (except I/O ports) (V

13、IN) -0.5 V dc to +7.0 V dc 4/ DC output voltage range (VOUT) -0.5 V dc to +5.5 V dc 4/ DC output current (IOL) (per output) +96 mA DC input clamp current (IIK) (VIN = 0.0 V). -18 mA DC output clamp current (IOK) (VOUT 0.0 V). -50 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (so

14、ldering, 10 seconds). +300C Thermal resistance, junction-to-case (JC) 1.9C/w Junction temperature (TJ) . +175C Maximum power dissipation (PD) . 684 mW 5/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC). +4.5 V dc to +5.5 V dc Input voltage range (VIN). +0.0 V dc to VCC Output

15、voltage range (VOUT) . +0.0 V dc to VCC Maximum low level input voltage (VIL ) 0.8 V Minimum high level input voltage (VIH ). 2.0 V Maximum high level output current (IOH). -24 mA Maximum low level output current (IOL). +48 mA Maximum input rise or fall rate (V/t) 10 ns/V Minimum set up time (ts): m

16、An before mCLKAB or mBn before mCLKBA 6.2 ns mAn, mBn, mCLKAB, mCLKBA, mSAB, mSBA, mDIR, or m OE before TCK 6.4 ns TDI before TCK 7.5 ns TMS before TCK 3.0 ns Minimum hold time (th): mAn after mCLKAB or mBn after mCLKBA 0.6 ns mAn, mBn, mCLKAB, mCLKBA, mSAB, mSBA, mDIR, or m OE after TCK . 0.7 ns TD

17、I after TCK . 0.5 ns TMS after TCK . 0.5 ns Minimum pulse width (tw): mCLKAB, or mCLKBA, high or low. 5.0 ns TCK high or low 8.2 ns Maximum clock frequency (fCLK): mCLKAB, or mCLKBA 100 MHz TCK. 50 MHz Case operating temperature range (TC) . -55C to +125C 1/ Stresses above the absolute maximum ratin

18、g may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCC range and case

19、 temperature range of -55C to +125C. 4/ The input negative voltage rating may be exceeded provided that the input clamp current rating is observed. 5/ The power dissipation are derived using the formula PD = VCC ICC + n VOL IOL , where VCC and IOL are as specified in 1.4 above, ICC and VOL are as sp

20、ecified in table I herein , and n represents the total number of outputs. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94698 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET

21、4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the s

22、olicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMEN

23、T OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Phi

24、ladelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. INSTITUTE OF ELECTRICAL AND ELECTRONIC ENGINEE

25、RS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Applications for copies should be addressed to the institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-4150.) 2.3 Order of precedence. In the event of a conflict betwee

26、n the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements

27、for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for

28、device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q

29、and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on

30、 figure 3. 3.2.4 Block diagram. The block diagram shall be as specified on figure 4. 3.2.5 Test access port controller and scan test registers. The test access port controller and scan test registers shall be as specified on figure 5. 3.2.6 Ground bounce waveforms and test circuit. The ground bounce

31、 waveforms and test circuit shall be as specified on figure 6. 3.2.7 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU

32、IT DRAWING SIZE A 5962-94698 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and pos

33、t-irradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3

34、.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. F

35、or RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for

36、device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 liste

37、d manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance subm

38、itted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certific

39、ate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, n

40、otification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review

41、the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see

42、 MIL-PRF-38535, appendix A). 3.11 IEEE 1149.1 compliance. The device shall be compliant with IEEE 1149.1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94698 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43

43、218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCC Group A subgroupsLimits 3/ Unit Min Max 4.5 V 1, 2, 3 2.5 IOH = -3 mA

44、5.0 V 1, 2, 3 3.0 High level output voltage 3006 VOH For all inputs affecting output under test, VIH = 2.0 V or VIL = 0.8 V IOH = -24 mA 4.5 V 1, 2, 3 2.0 V Low level output voltage 3007 VOL For all inputs affecting output under test, VIH = 2.0 V or VIL = 0.8 V IOL = +48 mA 4.5 V 1, 2, 3 0.55 V Nega

45、tive input clamp voltage 3022 VIC- For input under test, IIN = -18 mA 4.5 V 1, 2, 3 -1.2 V mCLK, mS, mDIR, m OE , TCK 1, 2, 3 +1.0 A or B ports 1, 2, 3 +100 Input current high 3010 IIH 4/ For input under test, VIN = VCC TDI, TMS 5.5 V 1, 2, 3 +10 A mCLK, mS, mDIR, m OE , TCK 1, 2, 3 -1.0 A or B port

46、s 1, 2, 3 -100 Input current low 3009 IIL 4/ For input under test, VIN = GND TDI, TMS 5.5 V 1, 2, 3 -150 A Three-state output leakage current high 3021 IOZH 5/ For control inputs affecting output under test, VIH = 2.0 V or VIL = 0.8 V VOUT = 2.7 V 5.5 V 1, 2, 3 +50.0 A Three-state output leakage cur

47、rent low 3020 IOZL 5/ For control inputs affecting output under test, VIH = 2.0 V or VIL = 0.8 V VOUT = 0.5 V 5.5 V 1, 2, 3 -50.0 A Off-state leakage current IOFF For input or output under test, VIN or VOUT = 5.5 V All other pins at 0.0 V 0.0 V 1 100 A High-state leakage current ICEX For output unde

48、r test, VOUT = 5.5 V Outputs at high logic state 5.5 V 1, 2, 3 50 A Output current 3011 IO 6/ VOUT = 2.5 V 5.5 V 1, 2, 3 -50 -180 mA Quiescent supply current delta, TTL input level 3005 ICC 7/ For input under test, VIN = 3.4 V For all other inputs, VIN = VCC or GND 5.5 V 1, 2, 3 1.5 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94698 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 D

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