DLA SMD-5962-94745 REV A-2009 MICROCIRCUIT MEMORY DIGITAL CMOS 256K X 1-BIT SERIAL CONFIGURATION PROM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated document to current requirements, and updating contact information and agency address. ksr 09-07-06 Charles Saffle REV SHET REV A SHET 15 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A

2、 PREPARED BY Gary L. Gross DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS 256K X 1-BIT SERIAL CONFIGURATION

3、PROM, MONOLITHIC SILICON DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-02-17 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94745 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E359-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without lice

4、nse from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94745 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and

5、M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the followin

6、g example: 5962 - 94745 01 Q X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-

7、38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s)

8、 identify the circuit function as follows: Device type Generic number 1/ Circuit function 01 1213 256K X 1-bit PROM 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendo

9、r self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Ou

10、tline letter Descriptive designator Terminals Package style P GDIP1-T8 or CDIP2-T8 8 Dual-in-line package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 2/ Supply voltage ra

11、nge to ground potential (VCC) -2.0 V dc to +7.0 V dc 3/ DC input voltage -2.0 V dc to +7.0 V dc 3/ Maximum power dissipation . 100 mW Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +150C Storage temperature range

12、(TSTG) . -65C to +150C Temperature under bias . -55C to +125C Data retention 10 years, minimum 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein). Provided by I

13、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94745 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC

14、) +4.75 V dc minimum to +5.25 V dc maximum Ground voltage (GND) . 0 V dc Input high voltage (VIH) . 2.0 V dc to VCC+0.3 V dc Input low voltage (VIL) . -3.0 V dc to 0.8 V dc Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbo

15、oks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, M

16、anufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Stand

17、ard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part

18、of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena (SEP) from Heavy Ion

19、 Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up

20、 Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. Th

21、ese documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes

22、 applicable laws and regulations unless a specific exemption has been obtained. 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ Minimum dc input is -0.3 V. During trans

23、itions, the inputs may undershoot to -2.0 V or overshoot to +7.0 V for periods shorter than 20 ns under no-load conditions. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94745 DEFENSE SUPPLY CENTER COLUMBUS

24、 COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management

25、 (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction,

26、and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2

27、.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth table shall be as specified on figure 2. 3.2.4 Output load circuit. The output load circuit shall be as specified on figure 3. 3.2.5 Timing waveforms. The timing waveforms shall be as

28、 specified on figure 4. 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 2. When required in screening (see 4.2 herein) or qualification conformance inspection, groups A, B, or C (see 4.4), the devices shall be programmed by the manufacturer prio

29、r to test. A minimum of 50 percent of the total number of cells shall be programmed or at least 25 percent of the total number of cells to any altered item drawing. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered item drawing. 3.3 Elect

30、rical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test r

31、equirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages whe

32、re marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-

33、PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required

34、in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall

35、 be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for devic

36、e classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535

37、, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects

38、 this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94745 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance cha

39、racteristics. Test Symbol Conditions 4.5 V VCC 5.5 V -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Power supply current (standby) ICC11, 2, 3 All 900 A Power supply current (active) ICC11/ DCLK = 2 MHz 1, 2, 3 All 100 mA Input leakage current IILVIN = GND

40、 or VCC 1, 2, 3 All 10 A Tri-state output off-state leakage current IOZVOUT = GND or VCC 1, 2, 3 All 10 A Input low voltage VIL1, 2, 3 All -0.3 0.8 V Input high voltage VIH1, 2, 3 All 2.0 VCC +0.3 V Output low voltage VOLIOL= 4mA 1, 2, 3 All 0.45 V Output high voltage VOHIOH= -4mA 1, 2, 3 All 2.4 V

41、Output capacitance COUT2/ f = 1.0 MHz, VOUT = 0 V see 4.4.1c4 All 10 pF Input capacitance CIN2/ f = 1.0 MHz, VOUT = 0 V see 4.4.1c4 All 10 pF Functional tests See 4.4.1d 7, 8A, 8B All Clock frequency fCK 1/ See figure 3 and 4 as applicable 9, 10, 11 All 6 MHz Clock period tCK 9, 10, 11 All 160 ns DC

42、LK low time tCL 9, 10, 11 All 80 ns DCLK high time tCH 9, 10, 11 All 80 ns Input rise time tR 2/ 9, 10, 11 All 20 ns Input fall time tF 2/ 9, 10, 11 All 20 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MIC

43、ROCIRCUIT DRAWING SIZE A 5962-94745 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 4.5 V VCC 5.5 V -55C TC +125C unless otherwise specified Group A subgroups Dev

44、ice type Limits Unit Min Max OE high to DATA output enabled tOEZX 9, 10 11 All 50 ns nCS low to DATA output enabled tCSZX 9, 10 11 All 50 ns nCS high to DATA output enabled tCSXZ 3/ 9, 10 11 All 50 ns nCS low setup time to first DCLK rising edge tCSS 9, 10 11 All 100 ns nCS low hold time after DCLK

45、rising edge tCSH 9, 10 11 All 0 ns Data setup time before rising edge on DCLK tDSU 9, 10 11 All 50 ns Data hold time after rising edge on DCLK tDH 9, 10 11 All 0 ns DCLK to DATA out delay tCO 4/ 9, 10 11 All 75 ns OE low or nCS high to DATA output disabled tXZ 3/ 9, 10 11 All 50 ns OE pulse width to

46、 guarantee counter reset tOEW 9, 10 11 All 100 ns Last DCLK + 1 to nCASC low delay tCASC 9, 10 11 All 60 ns Last DCLK + 1 to data tri-state delay tCKXZ 3/ 9, 10 11 All 50 ns nCS high to nCASC high delay tCEOUT 9, 10 11 All 100 ns 1/ May not be tested, but shall be guaranteed to the limits specified

47、in table I. 2/ CIN, COUT, tR, and tF, are not 100-percent tested, but shall be guaranteed to the limits specified in table I. 3/ tCSXZ, tXZ, tCKXZ, are parameters representing the device entering tri-state mode and, although not specifically tested, they are guaranteed by characterization. 4/ Eight

48、clock cycles are required after the tCSSsetup time has been met to clock out the first eight bits. These bits are all high and are used to synchronize the configuration process. The ninth clock cycle presents the first configuration data bit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94745 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION