DLA SMD-5962-94750 REV A-2011 MICROCIRCUIT DIGITAL ADVANCED CMOS SERIALLY CONTROLLED ACCESS NETWORK PARALLEL SERIAL CONVERTER TTL COMPATIBLE INPUTS CMOS OUTPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct group A subgroups for switching tests in table I. Update the boilerplate paragraphs in accordance with the latest MIL-PRF-38535 requirements. - jak 11-11-11 Thomas M. Hess REV SHEET REV A A A A A A A A A A A A A A A A A A A SHEET 15 16 17

2、 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 34 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWI

3、NG IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, SERIALLY CONTROLLED ACCESS NETWORK, PARALLEL/SERIAL CONVERTER TTL COMPATIBLE INPUTS, CMOS OUTPUTS, MONOLITHIC SILICON D

4、RAWING APPROVAL DATE 95-03-06 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94750 SHEET 1 OF 34 DSCC FORM 2233 APR 97 5962-E004-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94750 DLA LAND AND MA

5、RITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes ar

6、e available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94750 01 M X A Federal stock class designator RHA designator (see 1.2.1)

7、 Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device clas

8、s M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01

9、SCANPCS100F Serially controlled access network, parallel/serial converter, TTL compatible Inputs, CMOS outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor sel

10、f-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline

11、 letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 dual-in-line package Y GDFP2-F28 28 flat package 3 CQCC1-N28 28 leadless-chip-carrier package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A

12、 for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94750 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/

13、 Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input clamp current (IIK) (VIN= -0.5 V and VCC+ 0.5 V) 20 mA DC output clamp current (IOK) (VIN= -0.5 V and VCC+ 0.5 V) 20 mA DC

14、output source/sink current (IOUT) . 50 mA DC VCCor GND current (ICC, IGND) per output pin 50 mA 4/ DC latchup source or sink current 300 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 550 mW Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junc

15、tion-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCC Output voltage range (VOUT). +0.0 V dc to VCC Minimum high level input voltage (VIH) . 2.0 V Max

16、imum low level input voltage (VIL) - . 0.8 V Case operating temperature range (TC) . -55C to +125C Input edge rate (V/t) minimum: from VIN= 0.8 V to 2.0 V, 2.0 V to 0.8 V 125 mV/ns Maximum high level output current (IOH) . -24 mA Maximum low level output current (IOL) . +24 mA _ 1/ Stresses above th

17、e absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. The maximum junction temperature may be exceeded for allowable short duration burn-in screening conditions in accordance with method 5004 of MI

18、L-STD-883. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ This value represents the maximum total current flowing into or out of all VCCor GN

19、D pins. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94750 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specificatio

20、n, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535

21、- Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawin

22、gs. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following

23、 document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Adv

24、anced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Stand

25、ard Test Access Port and Boundary-Scan Architecture. (Copies of the IEEE documents can be found at the Institute of Electrical and Electronics Engineers web page at http:/www.ieee.org/ or from IEEE Service Center, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 08855-1331) 2.3 Order of precedence. In t

26、he event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The

27、individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The indi

28、vidual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and

29、 herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1 . Provided by IHSNot for ResaleNo

30、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94750 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 3.2.3 Mode and status register. The mode and status register shall be as specified on figu

31、re 2 . 3.2.4 Parallel processing interface. The parallel processing interface (PPI) shall be as specified on figure 3. 3.2.5 TAP controller state diagram. The TAP controller state diagram shall be as specified on figure 4. 3.2.6 Block diagram. The block diagram shall be as specified on figure 5. 3.2

32、.7 Synchronizer and consecutive read/write timing waveforms. The sunchronizer and consecutive read/write timing waveforms shall be as specified on figure 6. shall be as specified on figure 6. 3.2.8 Serial scan interface timing waveforms. The serial scan interface timing waveforms shall be as specifi

33、ed on figure 7. 3.2.9 Write cycle and read cycle timing waveforms. The write cycle and read cycle timing waveforms shall be as specified on figure 8. 3.2.10 Reset and interrupt timing waveforms. The rest and interrupt timing waveforms shall be as specified on figure 9. 3.2.11 Test circuit. The test

34、circuit shall be as specified on figure 10. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ca

35、se operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the ma

36、nufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for dev

37、ice classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance

38、 mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). F

39、or device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this

40、 drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device cl

41、asses Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 her

42、ein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers faci

43、lity and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 40 (see MIL-PRF-38535, appendi

44、x A). 3.11 IEEE 1149.1 compliance. This device shall be compliant with IEEE 1149.1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94750 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET

45、 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 Method 1/ Symbol Conditions -55C TC +125C 2/ 4.5 V VCC 5.5 V VCCGroup A subgroups Limits 3/ Unit unless otherwise specified Min Max High level output voltage 3006 VOH1For all inputs affecting output under

46、test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOH= -50 A 4.5 V 1, 2, 3 4.40 V VOH2For all inputs affecting output under test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOH= -50 A 5.5 V 1, 2, 3 5.40 V VOH3For all inputs affecting output

47、under test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOH= -24 mA 4.5 V 1 3.86 V 2, 3 3.70 VOH4For all inputs affecting output under test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOH= -24 mA 5.5 V 1 4.86 V 2, 3 4.70 VOH54/ For all input

48、s affecting output under test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOH= -50 mA 5.5 V 1, 2, 3 3.85 V Low level output voltage 3007 VOL1For all inputs affecting output under test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOL= +50 A 4

49、.5 V 1, 2, 3 0.10 V VOL2For all inputs affecting output under test VIN= VIHor VILVIH= 2.0 V, VIL= 0.8 V For all other inputs, VIN= VCCor GND IOL= +50 A 5.5 V 1, 2, 3 0.10 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S