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本文(DLA SMD-5962-94754 REV F-2009 MICROCIRCUIT MEMORY DIGITAL CMOS ONE-TIME PROGRAMMABLE LOGIC ARRAY (RAD HARD) MONOLITHIC SILICON.pdf)为本站会员(appealoxygen216)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-94754 REV F-2009 MICROCIRCUIT MEMORY DIGITAL CMOS ONE-TIME PROGRAMMABLE LOGIC ARRAY (RAD HARD) MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added changes in accordance with NOR 5962-R200-96 95-10-23 M. A. Frye B Added 03 and 04 device, editorial changes through out. 96-04-29 M. A. Frye C Added operational requirement for proper power-up reset. Updated boiler plate paragraphs. Added d

2、evice 05 and 06. ksr 98-01-07 Raymond Monnin D Added devices 07 and 08. Updated TABLE I. ksr 99-02-12 Raymond MonninE Change the Y package designation, from CQCC2-F28A to CQCC2-J28 and added footnote. Updated boilerplate paragraphs. ksr 04-09-09 Raymond Monnin F Update drawing to current requirement

3、s. Editorial changes throughout. ksr. 09-11-30 Charles F. Saffle REV SHET REV F F F F F SHEET 15 16 17 18 19 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHEC

4、KED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, (RAD-HARD), MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWI

5、NG APPROVAL DATE 95-06-06 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-94754 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E088-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94754 DEFENSE SUPPLY CENT

6、ER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finish

7、es are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 94754 01 V X X Federal stock class designator RHA designator (see

8、1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device

9、class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function

10、 tPDBuffer Type 01, 05 22VP10 22-input 10-output 25 ns CMOS AND-OR-Logic array 02 22VP10 22-input 10-output 25 ns TTL AND-OR-Logic array 03, 06 22VP10 22-input 10-output 20 ns CMOS AND-OR-Logic array 04 22VP10 22-input 10-output 20 ns TTL AND-OR-Logic array 07 22VP10 22-input 10-output 15.5 ns CMOS

11、AND-OR-Logic array 08 22VP10 22-input 10-output 15.5 ns TTL AND-OR-Logic array 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requireme

12、nts for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator T

13、erminals Package style X CDFP4-F24 24 Flat package L GDIP3-T24 or CDIP4-T24 24 Dual-in-line package Y CQCC2-J28 28 Unformed lead chip carrier package 1/ 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/

14、Package style description indicates this package is shipped with unformed leads; optional per footnote 9 in MIL-STD-1835 for this package.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94754 DEFENSE SUPPLY C

15、ENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ 3/ Supply voltage range -0.3 V dc to +7.0 V dc Input voltage range . -0.3 V dc to +7.0 V dc 4/ Output voltage applied -0.5 V dc to +7.0 V dc 4/ Output sink current . 12 mA Thermal

16、 resistance, junction-to-case (JC) See MIL-STD-1835 Maximum power dissipation (PD) 5/ . 1.6 W Maximum junction temperature . +175C Lead temperature (soldering, 10 seconds maximum) . +300C Data retention 10 years (minimum) 1.4 Recommended operating conditions. Supply voltage range (VDD) . 4.5 V dc to

17、 5.5 V dc 6/ High level input voltage (VIH) TTL . 2.2 V dc minimum Low level input voltage (VIL) TTL . 0.8 V dc maximum High level input voltage (VIH) CMOS . 0.7 x VDDLow level input voltage (VIL) CMOS . 0.3 x VDDCase operating temperature range (TC) -55C to +125C 1.5 Radiation features. Maximum tot

18、al dose available (dose rate = 50 - 300 rads(Si)/s). 1 x 106rads(Si) Single event phenomenon (SEP) : effective linear energy threshold (LET); with no upsets . 50 MeV-cm2/mg with no latch-up 109 MeV-cm2/mg 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following s

19、pecification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, Genera

20、l Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Dra

21、wings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Ex

22、tended operation at the maximum levels may degrade performance and affect reliability. 3/ All voltages referenced to VSS. 4/ Minimum voltage is -0.6 V dc which may undershoot to -2.0 V dc for pulses of less than 20 ns. Maximum output pin voltage is VCC+0.75 V dc which may overshoot to +7.0 V dc for

23、pulses of less than 20 ns. 5/ Must withstand the added PDdue to short circuit test; e.g., IOS. 6/ See 3.13 herein for important operating requirements. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94754 DE

24、FENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in t

25、he solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192M - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM Internati

26、onal, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlin

27、gton, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In t

28、he event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The

29、individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The indi

30、vidual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and

31、 herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). The truth

32、table(s) shall be as specified on figure 2. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be as specified below. Cobalt-60 Configuration for 24 Pin DIP Cobalt-60 Configuration for 24 Pin Flatpack Note: All inputs are through 2.5 K resistor Note: All inputs are through 2.5 K

33、resistor Typical current = 90 mA for two devices Typical current = 167.43 mA for two devices Pin number Configuration Pin number Configuration 1 0,1,0 1 0,1,0 2 1 2 1 3 1 3 1 4 1 4 1 5 1 5 1 6 1 6 1 7 1 7 1 8 1 8 1 9 1 9 1 10 1 10 1 11 1 11 1 12 GND 12 GND 3.2.4 Continued on next page. Provided by I

34、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94754 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 13 1 13 1 14 N/C 14 N/C 15 0 15 0 16 0 16 0 17 1 17 1 18 1 18 1

35、 19 0 19 0 20 0 20 0 21 1 21 1 22 1 22 1 23 N/C 23 N/C 24 VDD 24 VDD 1 = VDD, 0 = GND Switch on pin 1 is to be placed at ground (0) toggled to vdd (1) and then toggled back to ground (0) after power is applied and before irradiation to reset the device. 3.2.5 Logic diagram(s). The logic diagram(s) s

36、hall be as specified on figure 3. 3.2.6 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in screening (see 4.2 herein) or qualification conformance inspection, groups A, B, or C (see 4.3),

37、the devices shall be programmed by the manufacturer prior to test. A minimum of 50 percent of the total number of cells shall be programmed or at least 25 percent of the total number of cells to any altered item drawing. 3.2.7 Programmed devices. The requirements for supplying programmed devices sha

38、ll be as specified by an attached item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in TABLE IA and shall apply over the fu

39、ll case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in TABLE IIA. The electrical tests for each subgroup are defined in TABLE IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition,

40、 the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking

41、for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The com

42、pliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in

43、the contract, using an altered item drawing. 3.6.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 4.4.1 and TABLE IIA. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration

44、. 3.6.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 3.7 Certificate of compliance. For device classes Q and V,

45、 a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply i

46、n MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, t

47、he requirements of MIL-PRF-38535, appendix A and herein. 3.8 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

48、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94754 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 3.9 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.10 Verification and revie

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