DLA SMD-5962-95506 REV B-2009 MICROCIRCUIT MEMORY CMOS 4K X 8 PARALLEL SYNCHRONOUS FIFO MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 01-06-05 Raymond Monnin B Boilerplate update and part of five year review. tcr 09-06-15 Joseph Rodenbeck REV SHET REV B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23

2、 24 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY

3、 ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, CMOS, 4K X 8 PARALLEL SYNCHRONOUS FIFO, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-11-01 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-95506 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-

4、E333-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents

5、 two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assu

6、rance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95506 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing n

7、umber 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA desi

8、gnator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 72240L50 4K X 8 CMOS Parallel Synchronous FIFO 50 ns 02 72240L35 4K X 8 CMOS Parallel Synchronous FIFO 35 ns 03

9、 72240L25 4K X 8 CMOS Parallel Synchronous FIFO 25 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compl

10、iant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X

11、CDIP3-T28 or GDIP4-T28 28 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCU

12、IT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Terminal voltage with respect to ground . -0.5 V dc to +7.0 V dc DC output current 50 mA Storage temperature range . -65C to +135C Max

13、imum power dissipation (PD) 1.25 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5 V dc Supply voltage (GND) . 0 V Input high volt

14、age (VIH) 2.2 V dc minimum Input low voltage (VIL) . 0.8 V dc maximum Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent sp

15、ecified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Stan

16、dard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs). MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.

17、dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect r

18、eliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The f

19、ollowing documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard JESD 78 - IC Latch-Up Test. (Applications for cop

20、ies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be av

21、ailable in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulat

22、ions unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modifi

23、cation in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimension

24、s. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The

25、 terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradi

26、ation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Mark

27、ing. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA

28、product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device

29、classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manuf

30、acturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted t

31、o DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of

32、conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted withou

33、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Devic

34、e type Limit Unit unless otherwise specified Min Max Input leakage current ILI0.4 V VIN VCC1, 2, 3 All -10 +10 A Output leakage current ILOOE VIH, 0.4 VOUT VCC1, 2, 3 All -10 +10 A Output high voltage VOHIOH= -2 mA 1, 2, 3 All 2.4 V Output low voltage VOLIOL= 8 mA 1, 2, 3 All 0.4 V Active power supp

35、ly ICCf = 20 MHz, outputs open 1, 2, 3 All 180 mA current Input capacitance CINVIN= 0 V, f = 1.0 MHz, TA= +25C, see 4.4.1e 4 All 10 pF Output capacitance COUTVOUT= 0 V, f = 1.0 MHz, with output deselected ( OE = high), TA= +25C, see 4.4.1e 4 All 10 pF Functional tests See 4.4.1c 7, 8A, 8B All Clock

36、cycle frequency fs CL= 30 pF, input pulse levels = GND to 3.0 V; input rise/fall times = 3 ns; input timing reference levels = 1.5 V; output timing reference levels =1.5 V; see figure 3 and 4 9, 10, 11 01 20 MHz 02 28.6 03 40 Data access time tA9, 10, 11 01 3 25 ns 02 3 20 03 3 15 Clock cycle time t

37、CLK9, 10, 11 01 50 ns 02 35 03 25 Clock high time tCLKH9, 10, 11 01 20 ns 02 14 03 10 Clock low time tCLKL9, 10, 11 01 20 ns 02 14 03 10 Data setup time tDS9, 10, 11 01 10 ns 02 8 03 6 First read latency time tFRL9, 10, 11 All 1/ ns See footnotes at end of table. Provided by IHSNot for ResaleNo repr

38、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C

39、 TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limit Unit unless otherwise specified Min Max Data hold time tDHCL= 30 pF, input pulse levels = GND to 3.0 V; input rise/fall times = 3 ns; input timing reference levels = 1.5 V; output timing reference levels = 1.5 V; see figure 3 and 4 9, 10,

40、 11 01, 02 2 ns 03 1 Enable setup time tENS9, 10, 11 01 10 ns 02 8 03 6 Enable hold time tENH9, 10, 11 01, 02 2 ns 03 1 Reset pulse width 2/ tRS9, 10, 11 01 50 ns 02 35 03 25 Reset setup time tRSS9, 10, 11 01 50 ns 02 35 03 25 Reset recovery time tRSR9, 10, 11 01 50 ns 02 35 03 25 Reset to flag and

41、output tRSF9, 10, 11 01 50 ns time 02 35 03 25 Output enable to output in low Z 3/tOLZ9, 10, 11 All 0 ns Output enable to output tOE9, 10, 11 01 3 23 ns valid 02 3 15 03 3 13 Output enable to output tOHZ9, 10, 11 01 3 23 ns in high Z 3/ 02 3 15 03 3 13 See footnotes at end of table. Provided by IHSN

42、ot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Sy

43、mbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device type Limit Unit unless otherwise specified Min Max Write clock to full flag tWFFCL= 30 pF, input pulse levels 9, 10, 11 01 30 ns = GND to 3.0 V; input rise/fall 02 20 times = 3 ns; input timing 03 15 Read clock to empty flag tREF

44、reference levels = 1.5 V; 9, 10, 11 01 30 ns output timing reference levels 02 20 = 1.5 V; see figure 3 and 4 03 15 Read clock to almost- tAE9, 10, 11 01 30 ns empty flag 02 20 03 15 Write clock to almost-full tAF9, 10, 11 01 30 ns flag 02 20 03 15 Skew time between read tSKEW19, 10, 11 01 15 ns clo

45、ck and write clock 02 12 for empty flag & full flag 03 10 Skew time between read tSKEW29, 10, 11 01 45 ns clock and write clock for 02 42 almost-empty flag & 03 40 almost-full flag 1/ When tSKEW1 the minimum limit, tFRL(maximum) = tCLK+ tSKEW1. When tSKEW1 the minimum limit, tFRL(maximum) = either 2

46、tCLK+ tSKEW1or tCLK+ tSKEW1. The latency timing applies only at the empty boundary ( EF = LOW). 2/ Pulse widths less than the minimum values specified are not allowed. 3/ If not tested, shall be guaranteed to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking

47、 permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Device type All Case outline X Terminal number Terminal symbol 1 D42 D33 D24 D15 D06 AF 7 AE 8 GND 9 RCLK 10

48、 REN 11 OE 12 EF 13 FF 14 Q015 Q116 Q217 Q318 Q419 Q520 Q621 Q722 VCC23 WCLK 24 WEN 25 RS 26 D727 D628 D5FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95506 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321