DLA SMD-5962-95784 REV B-2004 MICROCIRCUIT DIGITAL RADIATION HARDENED HIGH SPEED CMOS DUAL J-K FLIP-FLOP WITH SET AND RESET MONOLITHIC SILICON《高速抗辐射互补金属氧化物半导体双重J-K双稳态多谐振荡器硅单片电路线型微电.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes made in accordance with NOR 5962-R135-98 98-07-14 Raymond L. Monnin B Incorporate revision A. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 04-02-26 Thomas M. Hess REV SHET REV B B B B B B B B B B SHE

2、ET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil THIS D

3、RAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-12-01 MICROCIRCUIT, DIGITAL, RADIATION HARDENED, HIGH SPEED CMOS, DUAL J-K FLIP-FLOP WITH SET AND RESET, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE

4、A CAGE CODE 67268 5962-95784 SHEET 1 OF 24 DSCC FORM 2233 APR 97 5962-E157-04 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

5、5784 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case

6、outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 95784 01 V X C Federal stock class designa

7、tor RHA designator (see 1.2.1) Devicetype (see 1.2.2) Device class designator Caseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate

8、 RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic

9、 number Circuit function 01 HCS109 Radiation hardened, SOS, high speed CMOS, dual J-K flip-flop with set and reset 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor

10、 self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Out

11、line letter Descriptive designator Terminals Package style E CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction

12、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95784 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC in

13、put voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input current, any one input (IIN). 10 mA DC output current, any one output (IOUT) 25 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) +265C The

14、rmal resistance, junction-to-case (JC): Case E 24C/W Case X 29C/W Thermal resistance, junction-to-ambient (JA): Case E 73C/W Case X 114C/W Junction temperature (TJ). +175C Maximum power dissipation at TA= +125C (PD): 4/ Case E 0.68 W Case X 0.44 W 1.4 Recommended operating conditions. 2/ 3/ Supply v

15、oltage range (VCC) +4.5 V dc to +5.5 V dc Case operating temperature range (TC). -55C to +125C Input voltage (VIN) 0 V to VCCOutput voltage (VOUT). 0 V to VCCMaximum low level input voltage (VIL) 30% of VCCMinimum high level input voltage (VIH). 70% of VCCMaximum input rise and fall time at VCC= 4.5

16、 V (tr, tf) 500 ns Radiation features: Total dose . 2 x 105Rads (Si) Single event phenomenon (SEP) effective linear energy threshold (LET), no upsets (see 4.4.4.4) . 100 MeV/(cm2/mg) 5/ Dose rate upset (20 ns pulse) . 1 x 1010 Rads (Si)/s 5/ Latch-up None 5/ Dose rate survivability . 1 x 1012Rads (S

17、i)/s 5/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Dep

18、artment of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. 1/ Stresses above the absolute maximum rating may cause permanent da

19、mage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of

20、 -55C to +125C unless otherwise noted. 4/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA) at the following rate: Case E. 13.7 mW/C Case X. 8.8 mW/C 5/ Guaranteed by design or process but not tested. Provided by IHSNot for

21、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95784 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microc

22、ircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are

23、available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this docu

24、ment, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device m

25、anufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified her

26、ein. 3.1.1 Microcircuit die. For requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, app

27、endix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. T

28、he logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.2.6 Irradiation test connections. The irradiation test connections shall be as specified in table III. 3.3 Electrical performa

29、nce characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. T

30、he electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For

31、packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordan

32、ce with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“

33、as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95784 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.6 Cert

34、ificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in or

35、der to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of

36、 MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with ea

37、ch lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verif

38、ication and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircu

39、it group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962

40、-95784 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VCCGroup A subgroups Limits 2/ Unit Min Max For all inpu

41、ts affecting output under test VIN= 3.15 V or 1.35 V For all other inputs VIN= VCCor GND IOH= -50 A All 1, 2, 3 4.40 V M, D, P, L, R 3/ All 4.5 V 1 4.40 For all inputs affecting output under test VIN= 3.85 V or 1.65 V For all other inputs VIN= VCCor GND IOH= -50 A All 1, 2, 3 5.40 High level output

42、voltage VOHM, D, P, L, R 3/ All 5.5 V 1 5.40 For all inputs affecting output under test VIN= 3.15 V or 1.35 V For all other inputs VIN= VCCor GND IOL= 50 A All 1, 2, 3 0.1 M, D, P, L, R 3/ All 4.5 V 1 0.1 For all inputs affecting output under test VIN= 3.85 V or 1.65 V For all other inputs VIN= VCCo

43、r GND IOL= 50 A All 1, 2, 3 0.1 Low level output voltage VOLM, D, P, L, R 3/ All 5.5 V 1 0.1 V 1 +0.5 For input under test, VIN= 5.5 V For all other inputs VIN= VCCor GND All 2, 3 +5.0 Input current high IIHM, D, P, L, R 3/ All 5.5 V 1 +5.0 A 1 -0.5 For input under test, VIN= GND For all other input

44、s VIN= VCCor GND All 2, 3 -5.0 Input current low IILM, D, P, L, R 3/ All 5.5 V 1 -5.0 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95784 DEFENSE SUPPLY CENTER COLUMBUS COLU

45、MBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VCC Group A subgroups Limits 2/ Unit Min Max 1 -4.8 For all inputs affecting output un

46、der test VIN= 4.5 V or 0.0 V For all other inputs VIN= VCCor GND VOUT= 4.1 V All 2, 3 -4.0 Output current high (Source) IOHM, D, P, L, R 3/ All 4.5 V 1 -4.0 mA 1 4.8 For all inputs affecting output under test VIN= 4.5 V or 0.0 V For all other inputs VIN= VCCor GND VOUT= 0.4 V All 2, 3 4.0 Output cur

47、rent low (Sink) IOLM, D, P, L, R 3/ All 4.5 V 1 4.0 mA 1 20.0 VIN= VCCor GND All 2, 3 400 Quiescent supply current ICCM, D, P, L, R 3/ All 5.5 V 1 400 A Input capacitance CIN5.0 V 4 10 pF 4 41 Power dissipation capacitance 4/ CPD VIH= 5.0 V VIL= 0.0 V f = 1 MHz, see 4.4.1c All 5.0 V 5, 6 56 pF VIH=

48、3.15 V, VIL= 1.35 V See 4.4.1b All 7, 8 L H Functional test 5/ M, D, P, L, R 3/ All 4.5 V 7 L H 9 2.0 26.0 CL= 50 pF RL= 500 See figure 4 All 10, 11 2.0 30.0 tPLH1M, D, P, L, R 3/ All 4.5 V 9 2.0 30.0 9 2.0 30.0 CL= 50 pF RL= 500 See figure 4 All 10, 11 2.0 35.0 Propagation delay time, nCP to nQ or

49、nQ 6/ tPHL1M, D, P, L, R 3/ All 4.5 V 9 2.0 35.0 ns 9 2.0 19.0 CL= 50 pF RL= 500 See figure 4 All 10, 11 2.0 23.0 Propagation delay time, nS to nQ 6/ tPLH2M, D, P, L, R 3/ All 4.5 V 9 2.0 23.0 9 2.0 31.0 CL= 50 pF RL= 500 See figure 4 All 10, 11 2.0 33.0 Propagation delay time, nS to nQ 6/ tPHL2M, D, P, L, R 3/ Al