DLA SMD-5962-95833 REV P-2009 MICROCIRCUIT LINEAR LVDS QUAD CMOS DIFFERENTIAL LINE DRIVER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outline F. Make changes to 1.2.4, 1.3, and FIGURE 1. - ro 97-10-20 R. MONNIN B Make change to power dissipation as specified under 1.3. - ro 97-11-18 R. MONNIN C Add device type 02. Add case outline X. Changes to JAand JCfor case F. Add

2、radiation hardened requirements. Add vendor CAGE 65342. - rrp 00-05-25 R. MONNIN D Make change to the offset voltage, VOS, test in table I. Update boilerplate. rrp 01-03-01 R. MONNIN E Add device type 03. Editorial changes throughout. rrp 01-06-11 R. MONNIN F Add radiation hardened version of device

3、 type 01. Make changes to 1.2.2, 1.5, ICC, and ICCZtests in table I. rrp 01-09-06 R. MONNIN G Add case outline Z. Changes to 1.2.4, 1.3, and figure 1. rrp 02-04-11 R. MONNIN H Make change to note 1/ in table I for device type 01. rrp 02-04-30 R. MONNIN J Make change to the neutron irradiation and SE

4、L latch-up tests in paragraph 1.5. Removed dose rate induced latchup testing and dose rate burnout paragraphs in section 4. Modified paragraph 4.4.4.3. rrp 02-08-12 R. MONNIN K Add device type 01 to the SEL latchup test in 1.5. rrp 03-05-08 R. MONNIN L Add power-off leakage test, IOFF, in table I. r

5、rp 03-07-28 R. MONNIN M Make changes to neutron irradiation and SEL latch-up features in paragraph 1.5. rrp 08-06-02 R. HEBER N Add room temperature anneal note to device type 01 in paragraph 1.5. rrp 09-01-06 R. HEBER P Add microcircuit die appendix A and paragraph 3.1.1. - ro 09-03-12 R. HEBER THE

6、 ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV P P P SHEET 15 16 17 REV STATUS REV P P P P P P P P P P P P P P OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY SANDRA ROONEY DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY SANDRA ROO

7、NEY COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MICHAEL A. FRYE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-05-03 MICROCIRCUIT, LINEAR, LVDS QUAD CMOS DIFFERENTIAL LINE DRIVER, MONOLITHIC SILICON AMSC N/A RE

8、VISION LEVEL P SIZE A CAGE CODE 67268 5962-95833 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E188-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

9、 REVISION LEVEL P SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in

10、 the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 95833 01 Q F X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device

11、class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the M

12、IL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 DS90C031 Radiation hardened, LVDS

13、 quad cmos differential line driver 02 UT54LVDS031 Radiation hardened, LVDS quad cmos differential line driver 03 UT54LVDSC031 Radiation hardened, LVDS quad cmos differential line driver with cold spare on LVDS bus 1.2.3 Device class designator. The device class designator is a single letter identif

14、ying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38

15、535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier X CDFP4-F16 16 Flat pack Z GDFP1-G16 16 Flat pack with gull

16、 wing leads 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9583

17、3 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL P SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) . -0.3 V to +6 V Input voltage (VIN) . -0.3 V to (VCC+ 0.3 V) Enable input voltage (EN, EN*) . -0.3 V to (VCC+ 0.3 V) Output voltage (DOUT+,

18、 DOUT-) -0.3 V to (VCC+ 0.3 V) Storage temperature range . -65C to +150C Maximum power dissipation (PD): Cases F and Z 1450 mW 2/ Case 2 1900 mW 2/ Case X . 1250 mW 2/ Lead temperature (soldering, 10 seconds) +260C Junction temperature (TJ) +150C 3/ Thermal resistance, junction-to-case (JC): Cases F

19、 and Z 14C/W Case 2 18C/W Case X . 10C/W Thermal resistance, junction-to-ambient (JA): Cases F and Z 145C/W Case 2 78C/W Case X . 120C/W 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V to 5.5 V Ambient operating temperature range (TA) . -55C to +125C 1.5 Radiation features Total d

20、ose (effective dose rate = 0.16 rad(Si)/s): Device type 01 . 100 Krad (Si) 4/ Total dose (dose rate = 50 300 rad(Si)/s): Device type 02 1 Mrad (Si) Device type 03 . 300 Krad (Si) Neutron irradiation: Device types 02 and 03 5/ Single event latch-up (SEL): Device types 01, 02, and 03 . 100 MeV-cm2/mg

21、6/ 7/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ At TA +25C, the derating factor for cases F and Z is 9.7 mW/C, 12.8 mW/C for case 2, and 0.04 mW/C for case X. 3/

22、For device types 02 and 03, the maximum junction temperature may be increased to +175C during burn-in and life test. 4/ Device type 01 is irradiated at dose rate = 50 - 300 rads(Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The e

23、ffective dose rate after extended room temperature anneal = 0.16 rad(Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 5/ Neutron irradiation is not tested but guaran

24、teed up to 1 x 1013neutrons/cm2. Contact manufacturer for requirements beyond this level. 6/ Limits are based on characterization, but not production tested unless specified by the customer through the purchase order or contract. 7/ Device type 01, applicable to class V only. Provided by IHSNot for

25、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL P SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and hand

26、books. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits,

27、 Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Sta

28、ndard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text

29、of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device

30、classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device clas

31、s M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and phy

32、sical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as

33、specified on figure 1. 3.2.3 Radiation exposure circuit. For device type 01, the radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. For device types 02 and 03, the

34、radiation exposure circuit shall be as specified in table III. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall app

35、ly over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted w

36、ithout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL P SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TA +125C unless otherwise specified G

37、roup A subgroups Device type Limits Unit Min MaxOutput voltage high VOHRL= 100 1,2,3 All 1.6 V Output voltage low VOLRL= 100 1,2,3 All 0.9 V Input voltage high VIH1,2,3 All 2.0 VCCV Input voltage low VIL1,2,3 All GND 0.8 V Input current IINVIN= VCC, GND, 2.5 V or 0.4 V 1,2,3 01 -10 10 A VIN= VCC, GN

38、D 3/ 02 -10 10 VIN= 5.5 V, VCC= GND, LVDS outputs 03 -10 10 01 250 450 mV Differential output voltage VOD1RL= 100 1,2,3 02, 03 250 400 Offset voltage VOSRL= 100 1,2,3 All 1.125 1.375 V DVOD1RL= 100 1,2,3 01 35 mV Change in magnitude of VOD1for complementary output states 02, 03 10 Change in magnitud

39、e of VOSfor complementary output states DVOSRL= 100 1,2,3 All 25 mV Input clamp voltage VIIIN= -18 mA 1,2,3 01 -1.5 V IIN= -18 mA 4/ 02, 03 -1.5 Power-off leakage IOFFVOUT= 0 V or 2.4 V, VCC= 0 V or open 1,2,3 01 -10 10 A Output short circuit current IOSVOUT= 0 V 1,2,3 01 -5.0 mA VOUT= 0 V 4/ 02, 03

40、 -5.0 Output tri-state current IOEN = 0.8 V, EN* = 2.0 V, VOUT= 0 V or VCC3/ 1,2,3 All -10 10 A ICCDIN= high or low 1,2,3 25 mA M,D,P,L,R 1 01 30 Drivers enabled supply current DIN= VCCor VSS3/ 1,2,3 02, 03 25 Drivers disabled supply current ICCZDIN= high or low EN = GND, EN* = VCC1,2,3 10 mA M,D,P,

41、L,R 1 01 30 DIN= VCCor VSSEN = GND, EN* = VCC 3/ 1,2,3 02, 03 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 R

42、EVISION LEVEL P SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxFunctional test FT See 4.4.1c 7,8 All Differential propagation delay, high

43、 to low tPHLD9,10,11 All 0.5 5.0 ns Differential propagation delay, low to high tPLHD9,10,11 All 0.5 5.0 ns Differential skew tSKD9,10,11 01 3 ns 4/ 02, 03 3 Channel to channel 5/ tSK19,10,11 01 ns skew 4/ 02, 03 3 Chip to chip skew 6/ tSK29,10,11 01 4.5 ns 4/ 02, 03 4.5 Disable time, high to Z tPHZ

44、9,10,11 01 20 ns 4/ 02, 03 10 Disable time, low to Z tPLZ9,10,11 01 20 ns 4/ 02, 03 10 Enable time, Z to high tPZH9,10,11 01 20 ns 4/ 02, 03 10 Enable time, Z to low tPZL9,10,11 01 20 ns 4/ 02, 03 10 1/ Device type 01 supplied to this drawing is tested at all levels M, D, P, L, R of irradiation. Dev

45、ice type 02 supplied to this drawing meets all levels M, D, P, L, R, F, G, H of irradiation. However, this device is only tested at the “H” level. Device type 03 supplied to this drawing meets all levels M, D, P, L, R, F of irradiation. However, this device is only tested at the “F” level. Pre and P

46、ost irradiation values are identical unless otherwise specified in Table I. When performing post irradiation electrical measurements for any RHA level, TA= +25C. 2/ For device type 01, VCC= 4.5 V, 5.0 V, and 5.5 V, RL= 100 between outputs, CL= 20 pF each output to GND, unless otherwise specified. Fo

47、r device types 02 and 03, VCC= 4.5 V and 5.5 V. 3/ Device types 02 and 03, tested at VCC= 5.5 V only. 4/ These parameters may not be tested, but shall be guaranteed to the limits specified in table I herein. 5/ Channel to channel skew is defined as the difference between the propagation delay of one

48、 channel and that of the others on the same chip with an event on the inputs. 6/ Chip to chip skew is defined as the difference between the minimum and maximum specified differential propagation delays. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95833 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL P SHEET 7 DSCC FORM 2234 APR 97 Device types 01 02, 03 Case outlines F and Z 2 X Terminal number T