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本文(DLA SMD-5962-96514 REV H-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUAD 2-INPUT NOR GATE MONOLITHIC SILICON.pdf)为本站会员(sofeeling205)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96514 REV H-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUAD 2-INPUT NOR GATE MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R071-97. - jak 96-11-25 Monica L. Poelking B Incorporate NOR and update boilerplate to latest MIL-PRF-38535 requirements. - CFS 01-06-11 Thomas M. Hess C Add device types 02 and 03. Add test circuit to figure 4

2、. Update boilerplate. Editorial changes throughout. LTG 04-10-27 Thomas M. Hess D Add appendix A to document. - LTG 07-02-20 Thomas M. Hess E Correct radiation features for device type 02 and 03 in section 1.5 and add footnote 8/. Correct footnotes 3/ and 7/ in Table IA. Correct SEP test limits in t

3、able IB. Correct paragraph 4.4.4.1. Update boilerplate paragraphs to current MIL-PRF-38535 requirements.- MAA 09-10-05 Thomas M. Hess F To update test condition of VOLand VOHin table IA. To change RHA level “H” to “G” for device type 01. Update radiation features in section 1.5 and table IB. Update

4、boilerplate paragraphs to current MIL-PRF-38535 requirements.- MAA 11-03-11 David J. Corbett G Add footnote 5 to figure 4. Add equivalent test circuit to figure 4. - jak 12-07-09 Thomas M. Hess H Add footnote 4/ for capacitance limit for measurements of propagation delay time to table IA. Delete dev

5、ice class M requirements throughout. MAA 13-08-13 Thomas M. Hess REV SHEET REV H H H H H H H SHEET 15 16 17 18 19 20 21 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 htt

6、p:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, QUAD 2-INPUT NOR GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTME

7、NT OF DEFENSE AMSC N/A DRAWING APPROVAL DATE 96-05-30 REVISION LEVEL H SIZE A CAGE CODE 67268 5962-96514 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E522-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96514

8、DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead fini

9、shes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. 5962 G 96514 01 V X C Federal RHA Device Device Case Lead stock class d

10、esignator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A d

11、ash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS02 Radiation hardened, quad 2-input NOR gate 02 54ACS02E Enhanced, radiation hardened, quad 2-input NOR gate 03 54ACS02E Enhanced

12、, radiation hardened, quad 2-input NOR gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s).

13、The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. . Prov

14、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96514 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VD

15、D) -0.3 V dc to +7.0 V dc DC input voltage range, any pin (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range, any pin (VOUT) -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temp

16、erature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC): Case outlines C and X (device type 01) . See MIL-STD-1835 Case outline X (device types 02 and 03) . 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device type 02 and

17、03 . 3.2 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device types 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) .

18、 -55C to +125C Maximum input rise and fall time at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ 1.5 Radiation features. 6/ Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105rads (Si) 7/ Device type 02 (effective dose rate = 1rad (Si)/s) 1 x 106rad (Si) 8/ Device type 03 (dose r

19、ate = 50 300 rads (Si)/s) 5 x 105rads (Si) 7/ Single event phenomenon (SEP): Device type 01: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 9/ Device types 02 and 03: No SEU occurs at effective LET (see 4.4.4.4) .108

20、MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 9/ Dose rate upset (20 ns pulse) (device types 01, 02 and 03) . 1 x 109rad (Si)/s 9/ 10/ Dose rate induced latch-up . None 9/ Dose rate survivability (device types 01, 02 and 03) . 1 x 1012rad(Si)/s 9/ 1/ Stresses above

21、the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the ful

22、l specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Radiation testing is

23、 performed on the standard evaluation circuit. 7/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A. 8/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum t

24、otal dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 9/ Limits are guarantee

25、d by design or process, but not production tested unless specified by the customer through the purchase order or contract. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Provided by IHSNot for ResaleNo reproduction

26、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96514 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specifica

27、tion, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits Manufacturing, General Specifi

28、cation for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (C

29、opies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified

30、herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these doc

31、uments are available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing take

32、s precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified her

33、ein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, a

34、nd physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as sp

35、ecified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

36、5962-96514 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and ac

37、quiring activity upon request. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance charac

38、teristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are def

39、ined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962

40、-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in M

41、IL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA

42、prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein, or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conforman

43、ce. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

44、5962-96514 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 3/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max High level in

45、put voltage VIH02, 03 3.0 V and 3.6 V 1, 2, 3 0.7 VDDV All 4.5 V and 5.5 V 1, 2, 3 0.7 VDDLow level input voltage VIL02, 03 3.0 V and 3.6 V 1, 2, 3 0.3 VDDV All 4.5 V and 5.5 V 1, 2, 3 0.3 VDDHigh level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs,

46、 VIN= VDDor VSSIOH= -100 A 02, 03 3.0 V 1, 2, 3 VDD-0.25 V For all inputs affecting output under test, VIN= VDDor VSS For all other inputs, VIN= VDDor VSSIOH= -100 A All 4.5 V 1, 2, 3 VDD-0.25 V Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDor VSSFor all other input

47、s, VIN= VDDor VSSIOL= +100 A 02, 03 3.0 V 1, 2, 3 0.25 V For all inputs affecting output under test, VIN= VDDor VSS For all other inputs, VIN= VDDor VSSIOL= +100 A All 4.5 V 1, 2, 3 0.25 V Input current high IIHFor input affecting output under test, VIN= VDD; For all other inputs VIN= VDDor VSSAll 5

48、.5 V 1, 2, 3 +1.0 A Input current low IILFor input affecting output under test, VIN= VSS; For all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A Output current (source) IOH4/ For output under test VOUT= VDD- 0.4 V; For all other inputs, VIN = VDDor VSS02, 03 3.0 V and 3.6 V 1, 2, 3 -6.0 mA For output under test VOUT= VDD- 0.4 V; For all other inputs, VIN= VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -8.0 mA Output current (sink) IOL4/ For output under test VOUT= 0.4 V; For all other inputs VIN= VDDor VSS02, 03 3.0 V and 3.6 V 1, 2, 3 +6.0 mA For output under test VOUT= 0.4 V; For all

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