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本文(DLA SMD-5962-96531 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED HEX NONINVERTING BUFFER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf)为本站会员(outsidejudge265)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96531 REV D-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED HEX NONINVERTING BUFFER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R113-97. 96-12-12 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-09-04 Thomas M. Hess C Correct the title to accurately describe the device function. Chang

2、e figure 4, switching waveforms and test circuit. Update boilerplate to the latest MIL-PRF-38535 requirements. - jak 07-08-23 Thomas M. Hess D Add die for classes Q and V with die appendix A for device type 01. Update boilerplate paragraphs as required by the current MIL-PRF-38535. Delete class M re

3、quirements throughout.- MAA 13-07-09 Thomas M. Hess REV SHEET REV D D D D D D D SHEET 15 16 17 18 19 20 21 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landan

4、dmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, HEX NONINVERTING BUFFER, TTL COM

5、PATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-05 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-96531 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E480-13 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

6、A 5962-96531 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines

7、and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96531 01 V X C Federal stock class designator RHA d

8、esignator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA de

9、signator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number

10、 Circuit function 01 54ACTS34 Radiation hardened, hex noninverting buffer, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and q

11、ualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Dual flat pack 1.2.5 Lead finish. The lead finish is as specifi

12、ed in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96531 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolut

13、e maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature ra

14、nge (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum package power dissipation (PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.

15、5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 4/ 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 - 300 rads (Si)

16、/s) . 1 x 106Rads (Si) Single event phenomenon (SEP): No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 6/ No SEL occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 6/ Dose rate upset (20 ns pulse) 1 x 109Rads (Si)/s 6/ Does rate latch-up . None 6/ Dose rate survivability 1 x 1012Ra

17、ds (Si)/s 6/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to VSS. 3/ The limits for the parameters specified here

18、in shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise noted. 4/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit. 6/ Limits are g

19、uaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96531 DLA LAND AND MARITIME C

20、OLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the is

21、sues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Stand

22、ard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk,

23、 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTE

24、RNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Con

25、shohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has b

26、een obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect

27、 the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4

28、 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching

29、waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96531 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR

30、 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation paramete

31、r limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the su

32、bgroups specified in table IIA. The electrical tests for each subgroup are described in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible du

33、e to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certif

34、ication mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.

35、1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance

36、. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

37、62-96531 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max High level input v

38、oltage VIHAll 4.5 V 1, 2, 3 2.25 V M, D, P, L, R, F, G, H 3/ All 1 2.25 All 5.5 V 1, 2, 3 2.75 M, D, P, L, R, F, G, H 3/ All 1 2.75 Low level input voltage VILAll 4.5 V 1, 2, 3 0.8 V M, D, P, L, R, F, G, H 3/ All 1 0.8 All 5.5 V 1, 2, 3 0.8 M, D, P, L, R, F, G, H 3/ All 1 0.8 High level output volta

39、ge VOHFor all inputs affecting output under test, VIN= VDDor VSSIOH= -8.0 mA All 4.5 V 1, 2, 3 3.15 V M, D, P, L, R, F, G, H 3/ All 1 3.15 Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDor VSSIOL= 8.0 mA All 4.5 V 1, 2, 3 0.4 V M, D, P, L, R, F, G, H 3/ All 1 0.4 Inp

40、ut current high IIHFor input under test, VIN= 5.5 V For all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A M, D, P, L, R, F, G, H 3/ All 1 +1.0 Input current low IILFor input under test, VIN= VSSFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A M, D, P, L, R, F, G, H 3/ All 1 -1.0 Qui

41、escent supply current delta, TTL input levels IDD4/ For input under test, VIN= VDD- 2.1 V For all other inputs, VIN= VDDor VSSAll 5.5 V 1, 2, 3 1.6 mA M, D, P, L, R, F, G, H 3/ All 1 1.6 Quiescent supply current IDDQVIN= VDDor VSSAll 5.5 V 1, 2, 3 10.0 A M, D, P, L, R, F, G, H 3/ All 1 10.0 See foot

42、notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96531 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance cha

43、racteristics Continued. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 2/ Unit Min Max Output current (Sink) IOL5/ VIN= VDDor VSS, VOL= 0.4 V All 4.5 V and 5.5 V 1, 2, 3 8.0 mA Output current (Source) IOH5/ VIN= VDDor VSS, VOH= VDD -0.

44、4 V All 4.5 V and 5.5 V 1, 2, 3 -8.0 mA Short circuit output current IOS6/ 7/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 200 mA Input capacitance CINf = 1 MHz, see 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf = 1 MHz, see 4.4.1c All 0.0 V 4 15.0 pF Switching power dissipation PSW8/ CL= 50 pF, per swit

45、ching output All 4.5 V and 5.5 V 4, 5, 6 1.8 mW/MHz Functional test 9/ VIH= 0.5 VDD, VIL= 0.8 V See 4.4.1b All 4.5 V and 5.5 V 7, 8 L H M, D, P, L, R, F, G, H 3/ All 7 L H Propagation delay time, An to Yn tPLH10/ CL= 50 pF, see figure 4 All 4.5 V and 4.5 V 9, 10, 11 1.0 11.0 ns M, D, P, L, R, F, G,

46、H 3/ All 9 1.0 11.0 tPHL10/ CL= 50 pF, see figure 4 All 4.5 V and 5.5 V 9, 10, 11 1.0 11.0 M, D, P, L, R, F, G, H 3/ All 9 1.0 11.0 1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA herein. Output terminals not desig

47、nated shall be high level logic, low level logic, or open, except for the IDDQand IDDtests, the output terminals shall be open. When performing the IDDQand IDDtests, the current meter shall be placed in the circuit such that all current flows through the meter. 2/ For negative and positive voltage a

48、nd current values, the sign designates the potential difference in reference to VSSand the direction of current flow respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ RHA devices supplied to this drawing have been characterized through all levels M, D, P, L, R, F, G, and H of irradiation. However, this device is only tested at the H level. Pre and Post irradiation values are identical unless otherwise specified in table I

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