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本文(DLA SMD-5962-96542 REV K-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf)为本站会员(postpastor181)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96542 REV K-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-INPUT NAND SCHMITT TRIGGER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R120-97. 96-12-12 Monica L. Poelking B Changes in accordance with NOR 5962-R257-97. 97-04-22 Monica L. Poelking C Incorporate Revisions A and B. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-10-02 Th

2、omas M. Hess D Add appendix A. LTG 02-01-31 Thomas M. Hess E Add footnote to dose rate upset and dose rate survivability in section 1.5. Add test circuit to figure 4. Add die detail B to appendix A. LTG 03-11-20 Thomas M. Hess F Add device types 02 and 03. Update boilerplate. Editorial changes throu

3、ghout. LTG 04-08-12 Thomas M. Hess G Correct radiation features in section 1.5 and add footnote 8/. Correct footnotes 2/ and 7/ in Table IA. Correct SEP test limits in table IB. Correct paragraph 4.4.4.1. Update boilerplate paragraphs to current MIL-PRF-38535 requirements. MAA 09-09-09 Thomas M. Hes

4、s H Correct radiation features in section 1.5 and on table IA and table IB. - LTG 11-02-22 David J. Corbett J Add footnote 5 to figure 4. Add equivalent circuit to figure 4 - jak 12-07-09 Thomas M. Hess K Add footnote 4/ for capacitance limit for measurements of propagation delay time to table IA. D

5、elete device class M requirements throughout. MAA 13-08-20 David J. Corbett REV SHEET REV K K K K K K K K K SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV K K K K K K K K K K K K K K OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS

6、, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED

7、, QUADRUPLE 2-INPUT NAND SCHMITT TRIGGER, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-05-31 REVISION LEVEL K SIZE A CAGE CODE 67268 5962-96542 SHEET 1 OF 23 DSCC FORM 2233 APR 97 5962-E526-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

8、ICROCIRCUIT DRAWING SIZE A 5962-96542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A

9、 choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96542 01 V X C Federal stoc

10、k class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked wit

11、h the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS132 Radiation hardened, quadruple 2-input NAND Schmitt trigger 02 54ACS132E Enhanced radiati

12、on hardened, quadruple 2-input NAND Schmitt trigger 03 54ACS132E Enhanced radiation hardened, quadruple 2-input NAND Schmitt trigger 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements docu

13、mentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 a

14、nd as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V . Provided by IHSNot for ResaleNo reproduction or networking p

15、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -

16、0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) . 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-c

17、ase (JC): Case outlines C and X (device type 01) See MIL-STD-1835 Case outline X (device types 02 and 03) 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 1.0 W Device type 02 and 03 3.2 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range

18、 (VDD): Device type 01 +4.5 V dc to +5.5 V dc Device types 02 and 03 +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise and fall time at VDD= 4.5 V (tr, tf) . 1 ns/V 5/

19、 1.5 Radiation features. 6/ Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105Rad (Si) 7/ Device type 02 (effective dose rate = 1rad (Si)/s) 1 x 106Rad (Si) 8/ Device type 03 (dose rate = 50 300 rads (Si)/s) 5 x 105Rads (Si) 7/ Single event phenomenon (SEP) effecti

20、ve: Device type 01: No SEU occurs at effective LET (see 4.4.4.4) 80 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 9/ Device types 02 and 03: No SEU occurs at effective LET (see 4.4.4.4) 108 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2)

21、9/ Dose rate upset (20 ns pulse) (device types 01, 02 and 03) . 1 x 109Rads (Si)/s 9/ 10/ Dose rate induced latch-up . None 9/ Dose rate survivability (device types 01, 02 and 03) . 1 x 1012Rads (Si)/s 9/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extende

22、d operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless other

23、wise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Radiation testing is performed on the standard evaluation circuit. 7/ Device types 01 and 03 are

24、tested in accordance with MIL-STD-883, method 1019, condition A. 8/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and Is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature

25、anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 9/ Limits are guaranteed by design or process, but not production tested unless specified by the cus

26、tomer through the purchase order or contract. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D

27、RAWING SIZE A 5962-96542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent spec

28、ified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standa

29、rd Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/

30、or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those

31、cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International

32、, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws a

33、nd regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan.

34、The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions sha

35、ll be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified

36、 on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

37、IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96542 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and sh

38、all be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA

39、 and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed

40、 in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator sha

41、ll still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as requ

42、ired in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA L

43、and and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device class

44、es Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96542

45、 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL K SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max Schmitt trigger positiv

46、e-going threshold VT+02, 03 3.0 V and 3.6 V 1, 2, 3 0.7 VDDV All 4.5 V and 5.5 V 1, 2, 3 0.7 VDDSchmitt trigger negative-going threshold VT-02, 03 3.0 V and 3.6 V 1, 2, 3 0.3 VDDV All 4.5 V and 5.5 V 1, 2, 3 0.3 VDDHysteresis (VT+ - VT-) VH02, 03 3.0 V 1, 2, 3 0.3 1.2 V All 4.5 V 1, 2, 3 0.6 1.5 Hig

47、h level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSIOH= -100 A 02, 03 3.0 V 1, 2, 3 2.75 V For all inputs affecting output under test, VIN= VDDor VSSIOH= -100 A All 4.5 V 1, 2, 3 4.25 V Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDo

48、r VSSIOL= +100 A 02, 03 3.0 V 1, 2, 3 0.25 V For all inputs affecting output under test, VIN= VDDor VSSIOL= +100 A All 4.5 V 1, 2, 3 0.25 V Input current high IIHFor input under test, VIN= VDDFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test, VIN= VSSFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A Output current (source) IOH 4/ For output under test VOUT= VDD- 0.4 V For all other inputs VIN = VDDor VSS02, 03 3.0 V and 3.6 V 1, 2, 3 -6.0 mA For output under test VOUT= VDD- 0.4 V For all other inputs VIN = VDDor VSSAll 4.5

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