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本文(DLA SMD-5962-96558 REV G-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED 8-BIT SERIAL PARALLEL-IN SERIAL-OUT SHIFT REGISTER MONOLITHIC SILICON.pdf)为本站会员(dealItalian200)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96558 REV G-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED 8-BIT SERIAL PARALLEL-IN SERIAL-OUT SHIFT REGISTER MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R100-97. CFS 96-11-18 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-11-01 Thomas M. Hess C Add device types 02 and 03. Add test circuit to figure 4. Updat

2、e boilerplate and editorial changes throughout. - LTG 04-05-26 Thomas M. Hess D Correct radiation features in section 1.5 and add footnote 7/ and 8/. Correct footnotes 2/ and 7/ in table IA. Correct SEP test limit in the table IB. Update boilerplate paragraphs to current requirements of MIL-PRF-3853

3、5. - MAA 09-10-05 Thomas M. Hess E Update radiation features. Change RHA level H to G of device type 01 in section 1.5 and SEP test limits table IB. Correct output voltage (Vol and Voh) test condition in table IA.and SEP test limits. - jak 11-03-09 David Corbett F Add footnote 5 to figure 4. Add equ

4、ivalent test circuit to figure 4. Delete device class M requirements throughout. - jak 12-08-01 Thomas M. Hess G Add footnote 4/ for capacitance limit for measurements of propagation delay time to table IA. MAA 13-09-12 Thomas M. Hess REV SHEET REV G G G G G G G G G G G G G SHEET 15 16 17 18 19 20 2

5、1 22 23 24 25 26 27 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING

6、 IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, 8-BIT SERIAL / PARALLEL-IN, SERIAL-OUT SHIFT REGISTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-07-16 REVISION LEVEL

7、 G SIZE A CAGE CODE 67268 5962-96558 SHEET 1 OF 27 DSCC FORM 2233 APR 97 5962-E530-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96558 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHE

8、ET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q ) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Num

9、ber (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 G 96558 01 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.

10、2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device

11、 type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS165 Radiation hardened, 8-bit serial/parallel-in, serial-out shift register 02 54ACS165E Enhanced, radiation hardened, 8-bit serial/ parallel-in, serial-out shift register 03 54ACS165E Enhanced, ra

12、diation hardened, 8-bit serial/ parallel-in, serial-out shift register 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38

13、535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for devi

14、ce classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96558 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/

15、Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C L

16、ead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC): Case outlines E and X (device type 01) . See MIL-STD-1835 Case outline X (device types 02 and 03) . 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device type

17、s 02 and 03 . 3.2 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 +4.5 V dc to +5.5 V dc Device types 02 and 03 +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (

18、TC) . -55C to +125C Maximum input rise and fall time at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ 1.5 Radiation features. Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105Rad (Si) 6/ Device type 02 (effective dose rate = 1rad (Si)/s) 1 x 106Rad (Si) 7/ Device type 03 (dose

19、rate = 50 300 rads (Si)/s) 5 x 105Rads (Si) 6/ Single event phenomenon (SEP) effective: Device type 01: Device type 01: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 8/ 9/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 8/ 9/ Device types 02 and 03: No SEU occurs at

20、effective LET (see 4.4.4.4) .108 MeV/(mg/cm2) 8/ 9/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 8/ 9/ Dose rate upset (20 ns pulse) (device types 01, 02 and 03) . 1 x 109Rads (Si)/s 8/ 10/ Dose rate induced latch-up . None 8/ Dose rate survivability (device types 01, 02 and 03) .

21、 1 x 1012Rads (Si)/s 8/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters

22、 specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point f

23、or tror tf 1 ns/V. 6/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A. 7/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The eff

24、ective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 8/ Limits are guaranteed by design or process, but

25、not production tested unless specified by the customer through the purchase order or contract. 9/ Radiation testing is performed on the standard evaluation circuit. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Pr

26、ovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96558 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standar

27、ds, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrat

28、ed Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDB

29、K-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part

30、 of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of s

31、emiconductor Devices. (Copies of these documents are available online at http:/www.astm.org/ or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references c

32、ited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordan

33、ce with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and phy

34、sical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table.

35、The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or netwo

36、rking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96558 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under d

37、ocument revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation paramete

38、r limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are described in table IA. 3.5 Marking. The p

39、art shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product us

40、ing this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of com

41、pliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved sour

42、ce of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535, appendix A shall be provide

43、d with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96558 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 6 DSCC FORM 2234 APR 97

44、 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max High level input voltage VIH02, 03 3.0 V and 3.6 V 1, 2, 3 0.7 VDDV All 4.5 V and 5.5 V 0.7 VDDLow level input voltage

45、 VIL02, 03 3.0 V and 3.6 V 1, 2, 3 0.3 VDDV All 4.5 V And 5.5 V 1, 2, 3 0.3 VDDHigh level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOH= -100 A 02, 03 3.0 V and 3.6 V 1, 2, 3 VDD-0.25 V For all inputs affecting output under test, V

46、IN= VDDor VSSFor all other inputs VIN= VDDor VSSIOH= -100 A All 4.5 V and 5.5 V 1, 2, 3 VDD-0.25 V Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL=+100 A 02, 03 3.0 V and 3.6 V 1, 2, 3 0.25 V For all inputs affecting output

47、 under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +100 A All 4.5 V and 5.5 V 1, 2, 3 0.25 V Input current high IIHFor input under test, VIN= VDD For all other inputs. VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test, VIN= VSS For all other inputs , VI

48、N= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A Output current (source) IOH 4/ For output under test VOUT= VDD- 0.4 V; For all other inputs, VIN = VDDor VSS02, 03 3.0 V and 3.6 V 1, 2, 3 -6.0 mA For output under test VOUT= VDD- 0.4 V; For all other inputs, VIN = VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -8.0 mA Output current (sink) IOL4/ For output under test VOUT= 0.4 V; For all other inputs VIN= VDDor VSS02, 03 3.0 V and 3.6 V 1, 2,

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