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本文(DLA SMD-5962-96594 REV B-2007 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS NONINVERTING OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《抗辐射互补金属氧化物半导体 .pdf)为本站会员(roleaisle130)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96594 REV B-2007 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS NONINVERTING OCTAL BUFFER LINE DRIVER WITH THREE-STATE OUTPUTS MONOLITHIC SILICON《抗辐射互补金属氧化物半导体 .pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R090-97. - JB 96-11-20 Monica L. Poelking B Add limit for linear energy threshold (LET) with no latch-up in section 1.5. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout

2、. - TVN 07-01-22 Thomas M. Hess REV SHET REV B B SHET 15 16 REV B B B B B B B B B B B B B B REV STATUS OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen CHECKED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPR

3、OVED BY Monica L. Poelking DRAWING APPROVAL DATE 96-05-13 MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, NONINVERTING OCTAL BUFFER/LINE DRIVER WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON SIZE A CAGE CODE 67268 5962-96594 STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY

4、ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REVISION LEVEL B SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E177-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-96594 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER

5、 COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes

6、 are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96594 01 V X A Federal RHA Device Device Case Lead stock class desig

7、nator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device

8、class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function

9、 01 54ACS541 Radiation hardened, noninverting octal buffer/line driver with three-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification

10、 to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descrip

11、tive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line X CDFP4-F20 20 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or ne

12、tworking permitted without license from IHS-,-,-SIZE A 5962-96594 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input vo

13、ltage range (VIN) -0.3 V dc to VDD + 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds). +300C Thermal resist

14、ance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum power dissipation (PD) . 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) 0.0 V dc to VDDOutput voltage range (VOUT). 0.0 V dc to VDDMax

15、imum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 4/ Case operating temperature range (TC). -55C to +125C 1.5 Radiation features. 5/ Total dose 1 x 106Rads (Si) Single event phenomenon (SEP) effective: Linear energy threshold (LET), no upsets (see 4.4.4.4). 80 MeV/(mg/cm2) Linear energy thr

16、eshold (LET), no latch-up (see 4.4.4.4). 120 MeV/(mg/cm2) Dose rate upset (20 ns pulse) 1 x 109Rads (Si)/s Latch-up. None Dose rate survivability 1 x 1012Rads (Si)/s 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may d

17、egrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Derate system propag

18、ation delays by difference in rise time to switch point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-96594 STANDARD MICROCIRCUIT DRAWING DEFENSE

19、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless oth

20、erwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-ST

21、D-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/ass

22、ist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in

23、 this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in th

24、e device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as spe

25、cified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be

26、 in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test

27、 circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.2.6 Irradiation test connections. The irradiation test connections shall be as specified in table III. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified h

28、erein, the electrical performance characteristics and post irradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-96594 STA

29、NDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in t

30、able IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the

31、 device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification

32、 mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-3

33、8535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compl

34、iance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.

35、7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device

36、class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option

37、to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group numbe

38、r 37 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-96594 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. El

39、ectrical performance characteristics. Limits 2/ Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Min Max Unit All 1, 2, 3 3.15 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 3.15 All 1, 2, 3 3.85 High level input voltage VIH M, D, P, L, R, F, G, H 3/ Al

40、l 5.5 V 1 3.85 V All 1, 2, 3 1.35 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 1.35 All 1, 2, 3 1.65 Low level input voltage VIL M, D, P, L, R, F, G, H 3/ All 5.5 V 1 1.65 V For all inputs affecting output under test, VIN= VDDor VSSIOH= -100 A All 1, 2, 3 4.25 High level output voltage VOH M, D, P, L, R, F

41、, G, H 3/ All 4.5 V 1 4.25 V For all inputs affecting output under test, VIN= VDDor VSSIOL= 100 A All 1, 2, 3 0.25 Low level output voltage VOL M, D, P, L, R, F, G, H 3/ All 4.5 V 1 0.25 V For input under test, VIN= VDDFor all other inputs, VIN= VDDor VSSAll 1, 2, 3 +1.0 Input current high IIH M, D,

42、 P, L, R, F, G, H 3/ All 5.5 V 1 +1.0 A For input under test, VIN= VSSFor all other inputs, VIN= VDDor VSSAll 1, 2, 3 -1.0 Input current low IIL M, D, P, L, R, F, G, H 3/ All 5.5 V 1 -1.0 A For output under test, VOUT= VDD - 0.4 V VIN= VDDor VSSAll 1, 2, 3 -12.0 Output current (source) IOH4/ M, D, P

43、, L, R, F, G, H 3/ All 4.5 V and 5.5 V 1 -12.0 mA For output under test, VOUT= 0.4 V VIN= VDDor VSSAll 1, 2, 3 12.0 Output current (sink) IOL4/ M, D, P, L, R, F, G, H 3/ All 4.5 V and 5.5 V 1 12.0 mA VIN= VDDor VSSAll 1, 2, 3 10.0 Quiescent supply current IDDQM, D, P, L, R, F, G, H 3/ All 5.5 V 1 10

44、.0 A Short circuit output current IOS5/ 6/ VOUT= VDDand VSSAll 5.5 V 1, 2, 3 300 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SIZE A 5962-96594 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

45、, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics Continued. Limits 2/ Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Min Max Unit Gm = 5.5 V For all other inputs, VIN= VDDor VSS

46、VOUT= VDD All 1, 2, 3 +30.0 Three-state output leakage current, high IOZHM, D, P, L, R, F, G, H 3/ All 5.5 V 1 +30.0 A Gm = 5.5 V For all other inputs, VIN= VDDor VSSVOUT= VSS All 1, 2, 3 -30.0 Three-state output leakage current, low IOZLM, D, P, L, R, F, G, H 3/ All 5.5 V 1 -30.0 A Input capacitanc

47、e CINf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF Output capacitance COUTf = 1 MHz See 4.4.1c All 0.0 V 4 15.0 pF CL= 50 pF, per switching output All 4, 5, 6 2.1 Switching power dissipation PSW7/ M, D, P, L, R, F, G, H 3/ All 4.5 V and 5.5 V 4 2.1 mW/MHzVIH= 0.7 VDD, VIL= 0.3 VDD See 4.4.1b All 7, 8 L H

48、 Functional test 8/ M, D, P, L, R, F, G, H 3/ All 4.5 V and 5.5 V 7 L H CL= 50 pF minimum See figure 4 All 9, 10, 11 1.0 11.0 tPLH9/ M, D, P, L, R, F, G, H 3/ All 4.5 V and 5.5 V 9 1.0 11.0 CL= 50 pF minimum See figure 4 All 9, 10, 11 1.0 14.0 Propagation delay time, An to Yn tPHL9/ M, D, P, L, R, F, G, H 3/ All 4.5 V and 5.5 V 9 1.0 14.0 ns CL= 50 pF minimum See figure 4 All 9, 10, 11 2.0 15.0 tPZH9/ M, D, P, L, R, F, G, H 3/ All 4.5 V and 5.5 V 9 2.0 15.0 CL= 50 pF minimum See figure 4 All 9, 10, 11 2.0 14.0 Propagation delay time, output enab

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