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本文(DLA SMD-5962-96665 REV D-2005 MICROCIRCUIT DIGITAL RADIATION HARDENED CMOS HEX VOLTAGE LEVEL SHIFTER FOR TTL-TO-CMOS OR CMOS-TO- CMOS OPERATION MONOLITHIC SILICON《抗辐射互补金属氧化物半导体晶体管对.pdf)为本站会员(medalangle361)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96665 REV D-2005 MICROCIRCUIT DIGITAL RADIATION HARDENED CMOS HEX VOLTAGE LEVEL SHIFTER FOR TTL-TO-CMOS OR CMOS-TO- CMOS OPERATION MONOLITHIC SILICON《抗辐射互补金属氧化物半导体晶体管对.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R091-98. JAK 98-04-20 Monica L. Poelking B Add device class T criteria. Editorial changes throughout. - JAK 98-12-09 Monica L. Poelking C Correct the total dose rate and update RHA levels. - LTG 99-04-28 Monica

2、 L. Poelking D Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 05-09-08 Thomas M. Hess REV SHET REV D D D D D D D SHEET 15 16 17 18 19 20 21 REV STATUS REV D B C D D C D D D B D B D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rajesh P

3、ithadia DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-1

4、2-14 MICROCIRCUIT, DIGITAL, RADIATION HARDENED, CMOS, HEX VOLTAGE LEVEL SHIFTER FOR TTL-TO-CMOS OR CMOS-TO- CMOS OPERATION, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-96665 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E496-05 Provided by IHSNot for ResaleNo reproduction or

5、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96665 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consisting of high

6、 reliability (device classes Q and M), space application (device class V) and for appropriate satellite and similar applications (device class T). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiatio

7、n Hardness Assurance (RHA) levels is reflected in the PIN. For device class T, the user is encouraged to review the manufacturers Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended application. 1.2 PIN. The PIN is as shown in the following

8、 example: 5962 R 96665 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q, T, and V RHA marked devices meet the MIL-PRF

9、-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s

10、) identify the circuit function as follows: Device type Generic number Circuit function 01 4504B Radiation hardened, CMOS, hex voltage level shifter for TTL-to-CMOS or CMOS-to-CMOS operation 1.2.3 Device class designator. The device class designator is a single letter identifying the product assuran

11、ce level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q, V Certification and qualification to MIL-PRF-38535 T Certification and qu

12、alification to MIL-PRF-38535 with performance as specified in the device manufacturers approved quality management plan. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E CDIP2-T16 16 Dual-in-l

13、ine X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, T, and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA

14、WING SIZE A 5962-96665 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.5 V dc to +20 V dc DC input voltage range (VIN) -0.5 V dc to VDD+ 0.5 V dc DC input current, any one inp

15、ut (IIN). 10 mA Device dissipation per output transistor . 100 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds). +265C Thermal resistance, junction-to-case (JC): Case outline E 24C/W Case outline X 29C/W Thermal resistance, junction-to-ambient (JA): Case o

16、utline E 73C/W Case outline X 114C/W Junction temperature (TJ) +175C Maximum package power dissipation at TA= +125C (PD): 4/ Case outline E 0.68 W Case outline X 0.43 W 1.4 Recommended operating conditions. Supply voltage range (VCC) +3.0 V dc to +18 V dc Case operating temperature range (TC). -55C

17、to +125C Input voltage range (VIN) +0.0 V to VDDOutput voltage range (VOUT). +0.0 V to VDD1.5 Radiation features: Maximum total dose available (dose rate = 50 300 rad (Si)/s) 1 x 105Rads (Si) Single event phenomenon (SEP) effective linear energy threshold (LET), no upsets (see 4.4.4.4) 75 MeV/(cm2/m

18、g) 5/ Dose rate upset (20 ns pulse) 5 x 108Rads (Si)/s 5/ Dose rate latch-up 2 x 108Rads (Si)/s 5/ Dose rate survivability 5 x 1011Rads (Si)/s 5/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance a

19、nd affect reliability. 2/ Unless otherwise noted, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C unless otherwise noted. 4/ If device power exceeds package dissipation capa

20、bility, provide heat sinking or derate linearly (the derating is based on JA) at the following rate: Case outline E . 13.7 mW/C Case outline X . 8.8 mW/C 5/ Guaranteed by design or process but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

21、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96665 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

22、 of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDAR

23、DS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available on

24、line at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited he

25、rein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q, T, and V shall be in accordance

26、with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF

27、-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

28、 in MIL-PRF-38535 and herein for device classes Q, T, and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q, T and V

29、 or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Irradiation test connections. The irradiation test connections s

30、hall be as specified in table III. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operat

31、ing temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

32、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-96665 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where mar

33、king of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q, T, and V shall be in accordance with MIL-PR

34、F-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q, T, and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as require

35、d in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q, T, and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance

36、 shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for

37、 device classes Q, T, and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q, T, and V in MIL-PRF-38535 or for device class M in

38、 MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any chang

39、e that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the o

40、ption of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN

41、DARD MICROCIRCUIT DRAWING SIZE A 5962-96665 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Limi

42、ts Unit Min Max Supply current IDDVDD= 5.0 V, VIN= VDDor GND All 1, 3 1/ 1.0 A 2 1/ 30.0 VDD= 10 V, VIN= VDDor GND 1, 3 1/ 2.0 2 1/ 60.0 DD= 15 V, VIN= VDDor GND 1, 3 1/ 2.0 2 1/ 120.0 VDD= 20 V, VIN= VDDor GND 1 2.0 2 200.0 M, D, P, L, R 2/ 1 7.5 VDD= 18 V, VIN= VDDor GND 3 2.0 Low level output IOL

43、VDD= 5 V All 1 0.53 mA current (sink) VO= 0.4 V 2 1/ 0.36 VIN= 0.0 V or VDD3 1/ 0.64 DD= 10 V All 1 1.4 VO= 0.5 V 2 1/ 0.9 VIN= 0.0 V or VDD3 1/ 1.6 DD= 15 V All 1 3.5 VO= 1.5 V 2 1/ 2.4 VIN= 0.0 V or VDD3 1/ 4.2 High level output IOHVDD= 5 V All 1 -0.53 mA current (source) VO= 4.6 V 2 1/ -0.36 VIN=

44、 0.0 V or VDD3 1/ -0.64 DD= 5 V All 1 -1.8 VO= 2.5 V 2 1/ -1.15 VIN= 0.0 V or VDD3 1/ -2.0 DD= 10 V All 1 -1.4 VO= 9.5 V 2 1/ -0.9 VIN= 0.0 V or VDD3 1/ -1.6 DD= 15 V All 1 -3.5 VO= 13.5 V 2 1/ -2.4 VIN= 0.0 V or VDD3 1/ -4.2 Input leakage IILVDD= 20 V, VIN= VDDor GND All 1 -100 nA current low 2 -10

45、00 VDD= 18 V, VIN= VDDor GND 3 -100 See footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96665 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC F

46、ORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max Input leakage IIHVDD= 20 V, VIN= VDDor GND All 1 100 nA current high 2 1000 VDD= 18 V, VIN= VDDor GND 3

47、100 Output voltage VOLVDD= 5 V, no load 1/ All 1, 2, 3 0.05 V low VDD= 10 V, no load 1/ 1, 2, 3 0.05 VDD= 15 V, no load 1, 2, 3 0.05 Output voltage VOHVDD= 5 V, no load 1/ All 1, 2, 3 4.95 high VDD= 10 V, no load 1/ 1, 2, 3 9.95 VDD= 15 V, no load 3/ 1, 2, 3 14.95 Input voltage low, TTL to CMOS VIL1

48、VDD= 10 V, VCC= 5.0 V VOH 9.0 V, VOL13.5 V, VOL9.0 V, VOL13.5 V, VOL13.5 V, VOL9.0 V, VOL13.5 V, VOL9.0 V, VOL13.5 V, VOL13.5 V, VOLVOLVCC) VDD = 15 V, VIN = VCC or GND VCC= 5.0 V 1/ 9 280.0 Propagation tPHL2, VDD= 10 V, VIN= VCCor GND All 9 240.0 ns delay time, tPLH2VCC= 5.0 V 10, 11 324.0 CMOS to

49、CMOS 6/ M. D, P, L, R 2/ 9 324.0 (VDD VCC) VDD = 15 V, VIN = VCC or GND VCC= 5.0 V 1/ 9 240.0 DD= 15 V, VIN= VCCor GND VCC= 10 V 1/ 9 140.0 Propagation tPHL3VDD= 5 V, VIN= VCCor GND All 9 550.0 ns delay time, VCC= 10 V 10, 11 743.0 CMOS to CMOS 6/ M. D, P, L, R 2/ 9 743.0 (VCC VDD) VDD = 5 V, VIN = VCC or GND VC

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