DLA SMD-5962-96690 REV J-2011 MICROCIRCUIT MEMORY DIGITAL FLASH EPROM 128K X 8-BIT MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED E Added vendor cage 88379 for device types 01 through 05. Figure 1; Added the pin reference numbers on the top view of case outline Y to indicate the pin orientation. -sld 99-03-29 K. A. Cottongim F Added vendor cage 88379 for the case outlines U a

2、nd T. Table I; VOLtest changed the test condition IOLfrom 12.0 mA to 8.0 mA. Redrew entire document. -sld 00-09-19 Raymond Monnin G Added vendor cage 0EU86 for device types 01 through 05. Updated drawing to reflect the latest requirements of MIL-PRF-38534. -sld 03-04-21 Raymond Monnin H Figure 1; Ca

3、se outline Y, changed the dimension “D“ min from 1.654 inches to 1.6 inches. Editorial changes troughout. -sld05-02-07 Raymond Monnin J Updated drawing paragraphs. -sld 11-07-13 Charles F. Saffle REV SHEET REV J J J J J J J J SHEET 15 16 17 18 19 20 21 22 REV STATUS REV J J J J J J J J J J J J J J O

4、F SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DE

5、PARTMENT OF DEFENSE APPROVED BY Kendall A. Cottongim MICROCIRCUIT, MEMORY, DIGITAL, FLASH EPROM, 128K X 8-BIT, MONOLITHIC SILICON DRAWING APPROVAL DATE 95-12-12 AMSC N/A REVISION LEVEL J SIZE A CAGE CODE 67268 5962-96690 SHEET 1 OF 22 DSCC FORM 2233 APR 97 5962-E370-11 Provided by IHSNot for ResaleN

6、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96690 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in p

7、aragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following e

8、xample: 5962 - 96690 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet t

9、he MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 F128K8-150CQ5, F010-150/

10、Q FLASH EPROM, 128K x 8-bit 150 ns 02 F128K8-120CQ5, F010-120/Q FLASH EPROM, 128K x 8-bit 120 ns 03 F128K8-90CQ5, F010-90/Q FLASH EPROM, 128K x 8-bit 90 ns 04 F128K8-70CQ5, F010-70Q FLASH EPROM, 128K x 8-bit 70 ns 05 F128K8-60CQ5, F010-60Q FLASH EPROM, 128K x 8-bit 60 ns 1.2.3 Device class designato

11、r. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as

12、 follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduce

13、d testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A

14、, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the

15、exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted

16、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96690 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designa

17、tor Terminals Package style T See figure 1 32 Flatpack, ceramic, single cavity U See figure 1 32 Flatpack, ceramic, single cavity, lead formed X See figure 1 32 SOJ, ceramic, single cavity Y See figure 1 32 DIP, ceramic, single cavity 1.2.5 Lead finish. The lead finish shall be as specified in MIL-P

18、RF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) 2/ -2.0 V dc to +7.0 V dc Signal voltage range (any pin except A9) 2/ -2.0 V dc to +7.0 V dc Power dissipation (PD) . 275 mW Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Data retention 10

19、years minimum Endurance (write/erase cycles) 10,000 cycles minimum A9 voltage for sector protect (VID) 3/ -2.0 V dc to +14.0 V dc 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.5 V dc to +0.8 V dc Input high voltage range (VIH

20、) +2.0 V dc to VCC+ 0.3 V dc Case operating temperature range (TC) . -55 C to +125 C A9 voltage for sector protect (VID) +11.5 V dc to +12.5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this

21、drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test

22、Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. 1/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Minimum DC vol

23、tage in input or I/O pins is -0.5 V dc. During voltage transitions, inputs may overshoot VSSto -2.0 V dc for periods up to 20 ns. Maximum DC voltage on output and I/O pins is VCC+0.5 V dc. During voltage transitions, outputs may overshoot to VCC+2.0 V dc for periods up to 20 ns. 3/ Minimum DC input

24、voltage on A9 is -0.5 V dc. During voltage transitions, A9 may overshoot VSSto -2.0 V dc for periods up to 20 ns. Maximum DC input voltage on A9 is +13.5 V dc which may overshoot to +14.0 V dc for periods up to 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

25、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96690 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies

26、 of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references

27、cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and

28、 K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 shall include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize

29、 the tests and inspections herein, however the performance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, constr

30、uction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as spe

31、cified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figure 4, 5, and 6. 3.2.5 Block diagram. The block diagram shall be as specified on figure 7. 3.3.6 Output load circuit. The output

32、load circuit shall be as specified on figure 8. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements.

33、 The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Programming procedure. The programming procedure shall be as specified by the manufacturer and shall be available upon request. 3.5 Marking of device(s).

34、 Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.7 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer of the

35、 device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are guar

36、anteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DLA Land and Maritime -VA) upon request. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCI

37、RCUIT DRAWING SIZE A 5962-96690 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 3.8 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawing. The certificate of compliance (original

38、copy) submitted to DLA Land and Maritime -VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot of microcircuits delivere

39、d to this drawing. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for the initial characterization and after any design process changes which may affect the reprogrammability of the device. The method

40、s and procedures may be vendor specific, but shall guarantee the number of program/erase cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing act

41、ivity. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor specific, but

42、 shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity. Provided by IHSNot for ResaleNo reproduction or netw

43、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96690 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA+125C unless otherwise specified

44、 Group A subgroups Device type Limits Unit Min Max DC parameters Input leakage current ILIVCC= 5.5 V dc, VIN= GND to VCC1,2,3 All 10 A Output leakage current ILOVCC= 5.5 V dc, VIN= GND to VCC1,2,3 All 10 A VCCActive current for read ICC1CS = VIL, OE = VIH1,2,3 All 35 mA VCCActive current for program

45、 or erase 3/ ICC2CS = VIL, OE = VIH1,2,3 All 50 mA VCCstandby current ICC3VCC= 5.5 V dc, CS = VIH, f = 5 MHz 1,2,3 All 1.6 mA Input low level 3/ VIL1,2,3 All 0.8 V Input high level 3/ VIH1,2,3 All 2.0 V Output low voltage VOLVCC= 4.5 V dc, IOL= 8.0 mA 1,2,3 All 0.45 V Output high voltage VOH1VCC= 4.

46、5 V dc, IOH= -2.5 mA 1,2,3 All 0.85 X VCCV VOH2VCC= 4.5 V dc, IOH= -100 A 1,2,3 All VCC- 0.4 Vdc V Dynamic characteristics OE capacitance 3/ COE VIN= 0 V, f = 1.0 MHz, TA= +25C 4 All 15 pF A0-A16 capacitance 3/ CADVIN= 0 V, f = 1.0 MHz, TA= +25C 4 All 15 pF See footnotes at end of table. Provided by

47、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96690 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symb

48、ol Conditions -55C TA+125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Dynamic characteristics - continued CS capacitance 3/ CCSVIN= 0 V dc, f = 1.0 MHz, TA= +25C4 All 15 pF WE capacitance 3/ CWEVIN= 0 V dc, f = 1.0 MHz, TA= +25C 4 All 15 pF I/O0-I/O7 capacitance 3/ CI/OVIN= 0 V dc, f = 1.0 MHz, TA= +25C 4 All 15 pF Functional testing Functional tests See 4.3.1c 7A,8A,8B All Read cycle AC t