DLA SMD-5962-96753 REV B-2009 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED CLOCK AND WAIT-STATE GENERATION CIRCUIT TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change the minimum setup time limit tSURfrom 16 ns to 7 ns in Table I. Update boilerplate and editorial changes made throughout. - CFS 99-05-17 Thomas M. Hess B Update the boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09

2、-05-05 Thomas M. Hess REV SHET REV B B B B B B SHEET 15 16 17 18 19 20 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen CHECKED BY Thanh V. Nguyen DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.d

3、la.mil APPROVED BY Monica L. Poelking STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-04-02 MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, CLOCK AND WAIT-STATE GENERATION CIRCUIT, TTL COM

4、PATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96753 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E256-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96753 DEFENSE SU

5、PPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and le

6、ad finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96753 01 V X C Federal stock class designator RHA designat

7、or (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator.

8、 Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit

9、function 01 54ACTS220 Radiation hardened, clock and wait-state generation circuit, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-cert

10、ification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline lette

11、r Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduct

12、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC

13、 input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds). +300C Therma

14、l resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Maximum package power (PD) 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VD

15、DCase operating temperature range (TC). -55C to +125C Maximum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 4/ 1.5 Radiation features. 5/ Maximum total dose available (dose rate = 50 - 300 rads (Si)/s) . 1 x 106Rads (Si) Single event phenomenon (SEP) effective linear energy threshold (LET).

16、No upsets (see 4.4.4.4) 80 MeV/(mg/cm2) Dose rate upset (20 ns pulse) 1 x 109Rads (Si)/s Latch-up. None Dose rate survivability 1 x 1012Rads (Si)/s 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance

17、 and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C. 4/ Derate system propagation delays by difference in rise time to switch

18、 point for tror tf 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

19、REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents a

20、re those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component

21、Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins

22、Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. AMERICAN SOCIETY FOR T

23、ESTING AND MATERIALS (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C70

24、0, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exem

25、ption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall

26、 not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction

27、, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections sha

28、ll be as specified on figure 1. 3.2.3 Functional timing waveforms. The functional timing waveforms shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall

29、 be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Irradiation te

30、st connections. The irradiation test connections shall be as specified in table III. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in

31、 table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the P

32、IN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA desig

33、nator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“

34、as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requir

35、ements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approve

36、d source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformanc

37、e as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (se

38、e 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable requi

39、red documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 39 (see MIL-PRF-38535, appendix A).Provided by IHSNot f

40、or ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits 2/ Test Symbol

41、Test conditions 1/ -55C TC +125C unless otherwise specified Devicetype VDDGroup A subgroups Min Max Unit All 1, 2, 3 2.25 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 2.25 All 1, 2, 3 2.75 High level input voltage VIHM, D, P, L, R, F, G, H 3/ All 5.5 V 1 2.75 V All 1, 2, 3 0.8 M, D, P, L, R, F, G, H 3/ All

42、 4.5 V 1 0.8 All 1, 2, 3 0.8 Low level input voltage VILM, D, P, L, R, F, G, H 3/ All 5.5 V 1 0.8 V For all inputs affecting output under test VIN= VDDor VSSIOH= -8.0 mA All 1, 2, 3 3.15 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 3.15 V For all inputs affecting output under test VIN= VDDor VSSIOH= -100.0

43、 A All 1, 2, 3 4.25 High level output voltage, except CLKOUT/CLKOUT VOH1M, D, P, L, R, F, G, H 3/ All 4.5 V 1 4.25 V For all inputs affecting output under test VIN= VDDor VSSIOH= -12.0 mA All 1, 2, 3 3.15 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 3.15 V For all inputs affecting output under test VIN= VD

44、Dor VSSIOH= -100.0 A All 1, 2, 3 4.25 High level output voltage, CLKOUT/CLKOUT VOH2M, D, P, L, R, F, G, H 3/ All 4.5 V 1 4.25 V For all inputs affecting output under test VIN= VDDor VSSIOL= 8.0 mA All 1, 2, 3 0.4 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 0.4 V For all inputs affecting output under test

45、VIN= VDDor VSSIOL= 100.0 A All 1, 2, 3 0.25 Low level output voltage, except CLKOUT/CLKOUT VOL1M, D, P, L, R, F, G, H 3/ All 4.5 V 1 0.25 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING S

46、IZE A 5962-96753 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics - Continued. Limits 2/ Test SymbolTest conditions 1/ -55C TC +125C unless otherwise specified Devicetype VDDGroup A subgroups Min

47、Max Unit For all inputs affecting output under test VIN= VDDor VSSIOL= 12.0 mA All 1, 2, 3 0.4 M, D, P, L, R, F, G, H 3/ All 4.5 V 1 0.4 V For all inputs affecting output under test VIN= VDDor VSSIOL= 100.0 A All 1, 2, 3 0.25 Low level output voltage, CLKOUT/CLKOUT VOL2M, D, P, L, R, F, G, H 3/ All

48、4.5 V 1 0.25 V For input under test VIN= 5.5 V For all other inputs VIN= VDDor VSSAll 1, 2, 3 +1.0 Input current high IIHM, D, P, L, R, F, G, H 3/ All 5.5 V 1 +1.0 A For input under test VIN= VSSFor all other inputs VIN= VDDor VSSAll 1, 2, 3 -1.0 Input current low IILM, D, P, L, R, F, G, H 3/ All 5.5 V 1 -1.0 A Output current, except CLKOUT/ CLKOUT (Source) IOH14/ VIN= VDDor VSSVOL= VDD- 0.4 V All 4.5 V and 5.5 V 1, 2, 3 -8.0 mA Output current, CLKOUT/CLKOUT (Source) IOH24/ VIN= VDDor VSSVOL= VDD- 0.4 V All 4.5 V and 5.5 V 1, 2, 3 -12.0 mA Output current, except CLKOUT/ CLKOUT