DLA SMD-5962-96766 REV B-2013 MICROCIRCUIT MEMORY DIGITAL RADIATION-HARDENED CMOS 256 X 8 STATIC RAM MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R153-96. - glg 96-06-27 Michael A. Frye B Update drawing to meet current MIL-PRF-38535 requirements. glg. 13-05-01 Charles F. Saffle REV SHEET REV B B B B B B SHEET 15 16 17 18 19 20 REV STATUS REV B B B B B B

2、B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A.

3、Frye MICROCIRCUIT, MEMORY, DIGITAL, RADIATION-HARDENED, CMOS, 256 X 8 STATIC RAM, MONOLITHIC SILICON DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-04-16 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96766 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E403-13 Provi

4、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance

5、 class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflecte

6、d in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 96766 01 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. D

7、evice classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit fun

8、ction Access time 01 81C55RH 256 X 8 Radiation hardened CMOS SRAM with CE 500 ns 02 81C56RH 256 X 8 Radiation hardened CMOS SRAM with CE 500 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requir

9、ements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP2-T40 40 Dual-in-line package Y See figure 1 42 Flat pack 1.2.

10、5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. 1.3 Absolute maximum ratings. 2/ Supply voltage range . +7.0 V dc Input, output, or I/O voltage . -0.3 V dc to VDD+0.3 V dc Maximum package power dissipation (PD) at TA= +125C Case V 1.25 W 3/ Case X 1.11 W 3

11、/ Lead temperature (soldering, 10 seconds maximum) +300C Thermal resistance, junction-to-case (JC): Case V 5.0C/W Case X 5.0C/W Thermal resistance, junction-to-ambient (JA): Case V 40.0C/W Case X 45.0C/W Junction temperature (TJ) +175C Storage temperature range -65C to +150C Provided by IHSNot for R

12、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VDD) +4.75 V dc to +5.25 V dc

13、 Ground voltage (GND) . 0.0 V dc Input high voltage (VIH) VDD-0.5 V to VDDInput Low voltage (VIL) . 0.0 V dc to 0.8 VDDCase operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Radiation features: Total dose irradiation . 100 KRads(Si) Dose rate upset 1 x 108Rads(Si)/sec 4/ Singl

14、e event phenomenon (SEP) effective threshold (LET) with no upsets 4/ Latchup. 1 x 1012Rads(Si)/sec 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless

15、otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL

16、-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardiz

17、ation Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitat

18、ion. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Ba

19、rr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein). 2/ Stresses above the absolute maxim

20、um rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA)at the following rate: case out

21、line X - - - 25.0 mW/C, case outline Y - - - 22.2 mW/C. 4/ Guaranteed by process or design, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-399

22、0 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publi

23、cations are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cite

24、d herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance

25、with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physic

26、al dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Radiation test connections. T

27、he radiation test connections shall be as specified in table III herein. 3.2.4 Functional tests. Functional tests used to test this device shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. Fo

28、r device classes Q and V alternate test patterns shall be under the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request. 3.3 Electrical performance characteristics and posti

29、rradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requiremen

30、ts shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is

31、not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance m

32、ark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this dr

33、awing (see 6.6.1 herein. The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate

34、of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRA

35、WING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C 5.25 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output vol

36、tage VOHVDD= 4.75, IOH= -2.0 mA 1, 2, 3 All 4.25 V M,D,L,R 1 1/ 2/ Low level output voltage VOLVDD= 4.75, IOH= 2.0 mA 1, 2, 3 All 0.5 V M,D,L,R 1 1/ 2/ High input leakage current IIHVDD= 5.25 V, VIN= 0.0 V Pin under test = VDD 1, 2, 3 All 1 A M,D,L,R 1 1/ 2/ Low input leakage current IILVDD= 5.25 V,

37、 VIN= 5.25 V Pin under test = VDD 1, 2, 3 All -1 A M,D,L,R 1 1/ 2/ Operating supply current IDDOPVDD= 5.25 V, f = 1 MHz 1, 2, 3 All 2 mA M,D,L,R 1 1/ 2/ Standby supply current IDDSBVDD= 5.25 V 1, 2, 3 All 200 A M,D,L,R 1 1/ 2/ Input capacitance 3/ CINVDD= open, f = 1.0 MHz, see 4.4.1c 4 All 10 pF I/

38、O capacitance 3/ CI/OVDD= open, f = 1.0 MHz, see 4.4.1c 4 All 12 pF Output capacitance COUTVDD= open, f = 1.0 MHz, see 4.4.1c 4 All 10 pF Functional tests see 4.4.1d, VIH= VDD-0.5 V VDD= 4.75 V and 5.25 V 7,8A,8B All VIL= 0.8 V M,D,L,R 7 1/ 2/ Data bus float after READ 3/ TRDFVDD= 4.75 V 9,10,11 All

39、 10 100 Ns Recovery time between controls 3/ TRVVDD= 4.75 V 9,10,11 All 220 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3

40、990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C 5.25 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Address latch setup time tALsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 60 ns M

41、,D,L,R 9 1/ 2/ Address hold time after latch tLAsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 60 ns M,D,L,R 9 1/ 2/ Latch to READ/WRITE control tLCsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 200 ns M,D,L,R 9 1/ 2/ Valid data out from READ control tRDsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 250 ns M,D,L,R 9

42、1/ 2/ Address stable to data out valid tADsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 500 ns M,D,L,R 9 1/ 2/ Latch enable width tLLsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 200 ns M,D,L,R 9 1/ 2/ READ/WRITE control to latch enable tCLsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 20 ns M,D,L,R 9 1/ 2/ READ/WR

43、ITE control width tCCsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 250 ns M,D,L,R 9 1/ 2/ See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 4

44、3218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C 5.25 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Data in to WRITE setup time tDWsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 200 ns M,D

45、,L,R 9 1/ 2/ Data in hold time after WRITE tWDsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 25 ns M,D,L,R 9 1/ 2/ WRITE to port output tWPsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 300 ns M,D,L,R 9 1/ 2/ Port input setup time tPRsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 50 ns M,D,L,R 9 1/ 2/ Port input hold

46、 time tRPsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 15 ns M,D,L,R 9 1/ 2/ Strobe to buffer full tSBFsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 300 ns M,D,L,R 9 1/ 2/ Strobe width tSSsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 150 ns M,D,L,R 9 1/ 2/ READ to buffer empty tRBEsee figure 3, VDD= 4.75 V 4/ 9,10

47、,11 All 300 ns M,D,L,R 9 1/ 2/ See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR

48、97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C 5.25 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max Strobe to INTR off tSIsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 300 ns M,D,L,R 9 1/ 2/ READ to INTR off tRDIsee figure 3, VDD= 4.75 V 4/ 9,10,11 All 360 ns M,D,L,R 9 1/ 2/ Port