1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. -rrp 04-11-23 R. MONNIN REV SHET REV A A A SHEET 15 16 17 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rajesh Pithadia DEFENSE SU
2、PPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL-LINEAR, 1394-1995 TRIPLE CABLE TRANSCEIVER/ARBITER, MONOLITHIC SILICON
3、AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 99-04-02 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-96771 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E032-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI
4、T DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device clas
5、s V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 96771 01 Q X A Fede
6、ral stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are mark
7、ed with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follo
8、ws: Device type Generic number Circuit function 01 TSB21LV03C 1394-1995 Triple Cable Transceiver/Arbiter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-cert
9、ification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline lette
10、r Descriptive designator Terminals Package style X See figure 1 68 Ceramic quad flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitt
11、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD) -0.3 V to +4.0 V Input voltage range (VIN) -0.5 V to VDD
12、+ 0.5 V Output voltage range at any output (VOUT). -0.5 V to VDD+ 0.5 V Continuous total power dissipation at TA= 25C . 2943 mW 2/ Storage temperature range (TSTG). -65C to +150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds +300C Thermal resistance, junction-to-ambient (JA) 47.57C/W
13、Thermal resistance, junction-to-case(JC) 3C/W Junction temperature (TJ) +165C 1.4 Recommended operating conditions. Supply voltage (VDD): Source power node. +3.0 V to +3.6 V Nonsource power node +2.7 V to +3.6 V 3/ High level input voltage (VIH): CMOS inputs . 0.85VDDV minimum Low level input voltag
14、e (VIL): CMOS inputs . 0.2VDDV maximum Differential input voltage (VID): Cable inputs, 100 Mbit operation . 260 mV maximum Cable inputs, 200 Mbit operation 260 mV maximum Cable inputs, during arbitration 262 mV maximum Common-mode input voltage (VIC): TPB cable inputs, 100 Mbit or speed signaling of
15、f, source power node 1.165 V to 2.515 V TPB cable inputs, 100 Mbit or speed signaling off, nonsource power node 1.165 V to 2.015 V 3/ TPB cable inputs, 200 Mbit speed signaling, source power node . 0.935 V to 2.515 V TPB cable inputs, 200 Mbit speed signaling, nonsource power node . 0.935 V to 2.015
16、 V 3/ Receive input jitter: TPA, TPB cable inputs, 100 Mbit operation . 1.08 ns TPA, TPB cable inputs, 200 Mbit operation . 0.5 ns Receive input slew: Between TPA and TPB cable inputs, 100 Mbit operation . 0.8 ns Between TPA and TPB cable inputs, 200 Mbit operation . 0.55 ns Output current (IOL/IOH)
17、: SYSCLK . -16 mA to 16 mA Control, Data, CNA and C/LKON outputs -12 mA to 12 mA Output current (IO): TPBIAS outputs . -3 mA to 1.3 mA Hold time, power-up reset (RESET ) 2 ms minimum Ambient operating temperature range (TA) -55C to +125C 1/ Stresses above the absolute maximum rating may cause perman
18、ent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ For TA 25C, derate at 21.02 mW/C. 3/ For a node that does not source power. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD
19、 MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this dr
20、awing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-
21、883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at htt
22、p:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the t
23、ext of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38
24、535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendi
25、x A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
26、 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Timing diagrams. The timing diagrams sh
27、all be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient opera
28、ting temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufactur
29、ers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device clas
30、ses Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CE
31、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDRIVER SECTION Differential output voltage VOD55 lo
32、ad 1, 2, 3 01 172 265 mV Off-state differential output voltage V(OFF)Drivers disabled 1, 2, 3 01 20 mV Differential current (TPA+, TPA-, TPB+, TPB-) 1/ IO(diff)Driver enabled, speed signaling off 1, 2, 3 01 -1.05 1.05 mA Common-mode speed signaling current 2/ (TPB+, TPB-) I(SP)200 Mbit speed signali
33、ng enabled 1, 2, 3 01 -2.53 -4.84 mA RECEIVER SECTION Input threshold voltage VIT1, 2, 3 01 -30 30 mV Cable bias detect input threshold voltage, TPBn cable inputs VCITDriver disabled 1, 2, 3 01 0.6 1.0 V Common-mode input current IICDriver disabled 1, 2, 3 01 -40 40 A Differential input impedance 3/
34、 ZIDDriver disabled 1, 2, 3 01 15 k 6 pFCommon-mode impedance 3/ ZICDriver disabled 1, 2, 3 01 20 k 24 pFDEVICE SECTION Supply current IDDVDD= 3.6 V 1, 2, 3 01 175 mA Power status input threshold voltage (CPS) VITRL= 400 k 1, 2, 3 01 4.7 7.5 V High level output voltage VOHVDD= min, IOHMAX1, 2, 3 01
35、VDD 0.55 V Low level output voltage VOLVDD= max, IOLMIN1, 2, 3 01 0.5 V Input current (TESTM1, TESTM2, PC0, PC1, PC2) IINVIN= VDDOR 0 V 1, 2, 3 01 1 A Off state output current (CTL0, CTL1, D0, D1, D2, D3, C/LKON) IOFFVOUT= VDDor 0 V 1, 2, 3 01 5 A Pull-up current ( RESET ) IPULLVIN= 0 V or 1.5 V 1,
36、2, 3 01 -110 -10 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97
37、TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDEVICE SECTION - CONTINUED Positive arbitration comparator-input threshold voltage VTH+1, 2, 3 01 89 168 mV Negative arbitrati
38、on comparator-input threshold voltage VTH-1, 2, 3 01 -168 -89 mV Speed signal input threshold voltage VITTPBIAS TPA common mode voltage 1, 2, 3 01 49 131 mV Output voltage (TPBIAS1, TPBIAS2, TPBIAS3) VOUTAt rated IOUTcurrent 1, 2, 3 01 1.665 2.015 V Jitter, transmit (measured TPA, TPB) - 9, 10, 11 0
39、1 0.25 ns Skew rate, transmit (measured between TPA and TPB) 3/ - 9, 10, 11 01 0.15 ns Rise time, transmit (measured 10% to 90%) 3/ 4/ trRL= 55 , CL= 10 pF 9, 10, 11 01 2.2 ns Fall time, transmit (measured 90% to 10%) 3/ 4/ tfRL= 55 , CL= 10 pF 9, 10, 11 01 2.2 ns Setup time, Dn, CTLn, LREQ to SYSCL
40、K (measured 50% to 50%) 3/ tsuSee figure 4 9, 10, 11 01 5 ns Hold time, Dn, CTLn, LREQ before SYSCLK (measured 50% to 50%) 3/ thSee figure 4 9, 10, 11 01 2 ns Delay time, SYSCLK to Dn, CTLn 3/ tdSee figure 4 9, 10, 11 01 2 11 ns 1/ Limits are defined as the algebraic sum of TPA+ and TPA- driver curr
41、ents. Limits also apply to TPB+ and TPB- as the algebraic sum of driver currents. 2/ Limits are defined as the absolute limit of each of TPB+ and TPB- driver currents. 3/ Not production tested. 4/ Rise and fall times are measured from the differential output signal of the twisted pair cable (TPA and
42、 TPB). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Case X Symbol Dimensions Inches Millimeters
43、 Min Max Min Max A .134 .154 3.404 3.912 b .008 .013 0.203 0.330 c .005 .007 0.130 0.178 D/E 1.30 1.50 33.02 38.10 D1/E1 .485 .500 12.32 12.70 D2/E2 .400 BSC 10.16 BSC e .025 BSC 0.65 BSC FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro
44、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outline X Terminal number Terminal symbol Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
45、 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 XO PLLVDDR0 R1 AGND AGND ISO DGND DGND RESET LPS LREQ VDD-5V DVDDDVDDPD DGND DGND SYSCLK DGND CTL0 CTL1 D0 D1 D2 D3 DGND DGND DVDDDVDDTESTM2 TESTM1 CPS AVDD35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66
46、 67 68 AVDDAGND AGND C/LKON PC2 PC1 PC0 CNA AGND TPB3- TPB3+ TPA3- TPA3+ TPB2- TPB2+ TPA2- TPA2+ AGND AGND TPB1- TPB1+ TPA1- TPA1+ TPBIAS1 TPBIAS2 TPBIAS3 AGND AGND AVDDPLLGND PLLGND FILTER AVDDX1 FIGURE 2. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted wi
47、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96771 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 Terminal Terminal number Type I/O Description AGND 5, 6, 36, 37, 43, 52, 53, 61, 62 Supply - Analog circuit ground. All A
48、GND terminals should be tied together to the low impedance circuit board ground plane. External to the device, AGND should be tied to DGND and PLLGND. AVDD34, 35, 63, 67 Supply - Analog circuit power. A combination of high frequency decoupling capacitors near each AVDDterminal is suggested, such as 0.1 F and 0.001 F capacitors. Lower frequency 10 F filtering capacitors are also recommended. AVDDterminals are separated from DVDDterminals internally from the other supply terminals
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