DLA SMD-5962-96786 REV A-2010 MICROCIRCUIT DIGITAL RADIATION HARDENED CMOS TTL CONVERTER 8-BIT BIDIRECTIONAL MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. drw 10-03-02 Charles F. Saffle REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Dan Wonnell DEFENSE SUPPLY CENTER COLUMBUS COL

2、UMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Sandra Rooney APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, RADIATION HARDENED, CMOS/TTL CONVERTER, 8-BIT, BIDIRE

3、CTIONAL, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-10 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-96786 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E210-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

4、 A 5962-96786 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice

5、 of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 96786 01 V W C Federal stock class

6、 designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the app

7、ropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device type Gen

8、eric number Circuit function 01 HS-3374RH Radiation hardened, 8-bit bidirectional CMOS/TTL level converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-ce

9、rtification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline. The case outline is as designated in MIL-STD-1835 as follows: Outline letter Descrip

10、tive designator Terminals Package style W CDIP2-T22 22 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro

11、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96786 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (VDD) +11.0 V Supply voltage (VCC) +VDDI/O voltage applied . GND 0.3 V to VDD+ 0.3 V Maxim

12、um package power dissipation (TA= +125C) . 0.67 W 2/ Thermal resistance, junction-to-case (JC) . 12.3C/W Thermal resistance, junction-to-ambient (JA) 74.8C/W Junction temperature (TJ) . +175C Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended ope

13、rating conditions. VDD. . +9.5 V to 10.5 V VCC. . +4.75 V to 5.25 V Input voltage ranges: Data inputs (CMOS) . GND 0.3 V to VDD+ 0.3 V Data inputs (TTL) GND 0.3 V to VCC+ 0.3 V Enable, disable inputs . GND 0.3 V to VDD+ 0.3 V Input low voltage (CMOS) . GND to 1 V Input high voltage (CMOS) . VDD 1.0

14、V to VDDInput low voltage (TTL) . 0.8 V Input high voltage (TTL) . 2.8 V Ambient operating temperature range (TA) -55C to +125C 1.5 Radiation features. Maximum total dose available 100 Krads(Si) Latch up . None 4/ Single event phenomenon (SEP) effective Linear energy threshold, no upsets (see 4.4.4.

15、3) 3/, 4/ 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or

16、 contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE

17、HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, P

18、A 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ If power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating

19、is based on JA) at the rate of 13.4 mW/C. 3/ Value to be specified when testing is completed. 4/ Guaranteed by process or design.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96786 DEFENSE SUPPLY CENTER COL

20、UMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable law

21、s and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) pla

22、n. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physi

23、cal dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal con

24、nections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Radiation exposure circuit. The radiation exposure test connections shall be as specified in table III. 3.3 Electrical performance characteristics and pos

25、tirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requi

26、rements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN numbe

27、r is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M

28、shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Cert

29、ificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in or

30、der to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of

31、 MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with ea

32、ch lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and re

33、view for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assig

34、nment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96786 DEFENSE

35、SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA+125C VDD= 10.5 V, VCC= 5.25 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max ENABLE AND DIS

36、ABLE INPUTS Input leakage current IIHCMOS VIN= 10.5 V, floating outputs 1, 2, 3 01 1 A TTL INPUT TO CMOS OUTPUTS Input leakage current IILVIN= 0.8 V, other inputs = 2.8 V 1, 2, 3 01 -1 A IIHVIN= 2.8 V, other inputs = 0.8 V 1 High level output voltage VOHVDD= 9.5 V, VCC= 4.75 V, VIH= 2.8 V, VIL= 0.8

37、V, IOH= -2.0 mA 1, 2, 3 01 9 V Low level output voltage VOLVIH= 2.8 V, VIL= 0.8 V, IOH= 2.0 mA 1, 2, 3 01 0.5 V CMOS TO TTL OUTPUTS High level output voltage VOHVDD= 9.5 V, VCC= 4.75 V, VIH= 8.5 V, VIL= 1.0 V, IOH= -2.0 mA 1, 2, 3 01 3 V Low level output voltage VOLVIH= 9.5 V, VIL= 1.0 V, IOH= 11 mA

38、 1, 2, 3 01 0.4 V Output leakage current IOZLVIN= 0 V, all other pins high 1, 2, 3 01 -10 A IOZHVIN= 2.8 V, all other pins GND 10 Functional tests (see 4.4.1c) FT (CMOS) VDD= 10.5 V, VCC= 5.25 V, VIH= VDD 1 V, VIL= 1 V 7, 8 01 VDD= 9.5 V, VCC= 4.75 V, VIH= VDD 1 V, VIL= 1 V FT (TTL) VDD= 10.5 V, VCC

39、= 5.25 V, VIH= 2.8 V, VIL= 0.8 V VDD= 9.5 V, VCC= 4.75 V, VIH= 2.8 V, VIL= 0.8 V Static current SICCEN = 0 V, DISABLE = 2.8 V floating output, measure VCCpin 1, 2, 3 01 5 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-

40、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96786 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA+125C VDD= 10.5 V, VCC= 5.25 V Group A subgroups Dev

41、ice type Limits Unit unless otherwise specified Min Max CMOS TO TTL OUTPUTS - continued Static current 1 SIDD1EN = 2.8 V, DISABLE = 2.8 V, floating outputs 1, 2, 3 01 300 A Static current 2 SIDD2EN = 0 V, DISABLE = 2.8 V, floating outputs 1, 2, 3 01 100 A AC ELECTRICAL Propagation delay times CMOS d

42、ata in to TTL data out tPHLCT2/ 9, 10, 11 01 40 ns tPLHCT2/ 50 Propagation delay times TTL data in to CMOS data out tPHLTC2/ 9, 10, 11 01 85 ns tPLHTC2/ 70 Transition times CMOS input to TTL output tTHLCT2/ 9, 10, 11 01 20 ns tTLHCT2/ 70 Transition times TTL input to CMOS output tTHLTC2/ 9, 10, 11 0

43、1 50 ns tTLHTC2/ 50 Propagation delay times TTL/CMOS ENABLE to CMOS out tPHZTC2/ 9, 10, 11 01 90 ns tPZHTC2/ 90 tPLZTC2 85 PZLTC2/ 90 Propagation delay times CMOS/TTL DISABLE to TTL out tPHZCT2/ 9, 10, 11 01 70 ns tPZHCT2/ 130 tPLZCT2 120 PZLCT2/ 125 See footnotes at end of table.Provided by IHSNot

44、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96786 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Sym

45、bol Conditions 1/ -55C TA+125C VDD= 10.5 V, VCC= 5.25 V Group A subgroups Device type Limits Unit unless otherwise specified Min Max CAPACITANCE Input capacitance 3/ CINVDD= open, f = 1 MHz, all measurements referenced to device ground 4 01 15 pF Input, output capacitance 3/ CI/O(CMOS) VDD= open, f

46、= 1 MHz, all measurements referenced to device ground 4 01 13 pF CI/O(TTL) 17 1/ Devices supplied to this drawing meet all levels M, D, P, L and R of irradiation however this device is only tested at the R level. Pre and post irradiation values are identical unless otherwise specified in table I. Wh

47、en performing post irradiation electrical measurements for any RHA level, TA= +25C. 2/ CL= 100 pF, VDD= 9.5 V, VCC= 4.75 V, VIH= 8.5 V for CMOS input to TTL output, VIH= 2.8 V for TTL input to CMOS output, VIL= 1.0 V for CMOS input to TTL output, VIL= 0.8 V for TTL input to CMOS output. 3/ These par

48、ameters are controlled via design or process parameters and are not tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall