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本文(DLA SMD-5962-96791 REV C-2013 MICROCIRCUIT DIGITAL 3 VOLT MULTIMEDIA VIDEO PROCESSOR MONOLITHIC SILICON.pdf)为本站会员(吴艺期)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-96791 REV C-2013 MICROCIRCUIT DIGITAL 3 VOLT MULTIMEDIA VIDEO PROCESSOR MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R001-00. 99-11-16 Monica L. Poelking B Update table I, figure 2, and table III to revised vendor datasheet specifications. Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-07-13 Thomas M. Hess C Updat

2、e boilerplate to current MIL-PRF-38535 requirements. - PHN 13-05-06 Thomas M. Hess REV C C C C C C C C SHEET 55 56 57 58 59 60 61 62 REV C C C C C C C C C C C C C C C C C C C C SHEET 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 REV C C C C C C C C C C C C C C C C C C C C SHEET 15 16 1

3、7 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED Thomas M. Hess DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY

4、 Thomas M. Hess THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, 3 VOLT MULTIMEDIA AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-06-10 VIDEO PROCESSOR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5

5、962-96791 SHEET 1 OF 62 DSCC FORM 2233 APR 97 5962-E387-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96791 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97

6、1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available,

7、 a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 96791 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish

8、(see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circ

9、uit function as follows: Device type Generic number Circuit function 01 320C80-50 Multimedia video processor 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certifi

10、cation and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA34-PN 305 1/ Pin grid array Y See figure 1 320 Ceramic quad flatpack with non-conductive tie-bar

11、1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. _ 1/ This case outline contains capacitor pads located on top of the package. The terminals are referenced clockwise starting at the index corner. See figure 2 for terminal values. Provided by IHSNot for

12、ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96791 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +4.0 V

13、 dc Input voltage range (VIN) -0.3 V dc to +4.0 V dc Output voltage range (VOUT) . -0.3 V dc to +4.0 V dc Storage temperature range (TSTG) -55C to +150C Thermal resistance, junction-to-case (JC): Case X . 1.4C/W Case Y . 2C/W Maximum power dissipation (PD) . 8.6 W Junction temperature (TJ) . +150C 1

14、.4 Recommended operating conditions. Supply voltage range (VDD) 3.135 V dc to 3.465 V dc Supply voltage range (VSS) 0 V dc 4/ Case operating temperature range (TC) . -55C to +125C High level output current (IOH) -400 A Low level output current (IOL) . 2 mA 2. APPLICABLE DOCUMENTS 2.1 Government spec

15、ification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PR

16、F-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircui

17、t Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Go

18、vernment publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of

19、 documents not listed in the DODISS are the issues of the documents cited in the solicitation. INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Copies of these documents are available online at http:/www.i

20、eee.org or from the IEEE Service Center, 445 Hoes Lane, P.O. Box 1331, Piscataway, NJ 088551331). _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond th

21、ose indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may degrade performance and affect reliability. 3/ All voltage values are with respect to VSS. 4/ To minimize noise on VSS, care should be taken to provide a mini

22、mum inductance path between the VSSterminals and system ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96791 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 AP

23、R 97 (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between th

24、e text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for

25、device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical di

26、mensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as

27、specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms. The timing waveforms shall be as specified on figure 4. 3.2.5 Boundary scan instruction codes. For device type 01 the boundary scan instruction codes shall be as specified on figu

28、re 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 El

29、ectrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. Fo

30、r packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accord

31、ance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manuf

32、acturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the

33、requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. 3.8 IEEE 1149.1 compliance. Device type 01 shall be compliant wit

34、h IEEE 1149.1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96791 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characterist

35、ics. See footnotes at end of table. Test Symbol Conditions 1/ -55C TC +125C, unless otherwise specified Group A subgroups Device types Limits Unit Min Max High level input voltage VIH1, 2, 3 All 2 VDD+ 0.3 V Low level input voltage VIL1, 2, 3 All -0.3 0.8 V High level output voltage VOHVDD= min, IOH

36、= max 1, 2, 3 All 2.2 V Low level output voltage VOLVDD= max, IOL= max 1, 2, 3 All 0.8 V Output current, leakage (high-impedance) (except EMU0 and EMU1) IOVDD= max, VO= 2.8 V 1, 2, 3 All 20 A VDD= max, VO= 0.6 V -20 Input current (except TCK, TDI, TMS, and TRST) IIVI= VSSto VDD1, 2, 3 All 20 A Suppl

37、y current 1/ IDDVDD= max, 50 MHz 1, 2, 3 All 2.5 A Input capacitance CISee 4.4.1c 4 All 15 pF Output capacitance COSee 4.4.1c 4 All 15 pF Functional test See 4.4.1b 7, 8 All Period of CLKIN (tH) 1 (tC(CKI) 9, 10, 11 All 10 ns Pulse duration of CLKIN high 2 9, 10, 11 All 4.2 ns Pulse duration of CLKI

38、N low 3 9, 10, 11 All 4.2 ns Transition time of CLKIN 2/ 4 9, 10, 11 All 1.5 ns Period of CLKOUT 5 9, 10, 11 All 2tC(CKI)3/ ns Pulse duration of CLKOUT high 6 9, 10, 11 All tH 4.5 ns Pulse duration of CLKOUT low 7 9, 10, 11 All tH 4.5 ns Transition time of CLKOUT 8 9, 10, 11 All 2.5 2/ ns Duration o

39、f RESET low 9 Initial reset during power-up 9, 10, 11 All 6tHns Reset during active operation 6tHProvided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96791 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION

40、LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Test Symbol Conditions 1/ -55C TC +125C, unless otherwise specified Group A subgroups Device types Limits Unit Min Max Setup time of HREQ low to RESET high to configure s

41、elf-bootstrap mode 10 9, 10, 11 All 4tHns Hold time, HREQ low to RESET high to configure self-bootstrap mode 11 9, 10, 11 All 0 ns Setup time of UTIME low to RESET high to configure big endian operation 12 9, 10, 11 All 4tHns Hold time, UTIME low after RESET high to configure big endian operation 13

42、 9, 10, 11 All 0 ns Setup time, AS, BS, CT, PS, and UTIME valid to CLKOUT no longer low 14 9, 10, 11 All 8 ns Hold time, AS, BS, CT, PS, and UTIME valid to CLKOUT high 15 9, 10, 11 All 2 ns Access time, AS, BS, CT, PS, and UTIME valid after memory identification (A, STATUS) valid 16 9, 10, 11 All 3t

43、H- 10 ns Access time, RETRY, READY, and FAULT valid after memory identification (A, STATUS) valid 17 9, 10, 11 All ntH- 8 ns Setup time, RETRY, READY, and FAULT valid to CLKOUT no longer high 18 9, 10, 11 All 7.5 ns Hold time, RETRY, READY, and FAULT valid to CLKOUT low 19 9, 10, 11 All 1.2 ns Acces

44、s time, RETRY, and READY valid from RAS low 20 9, 10, 11 All ntH 7.5 ns Access time, RETRY, and READY valid from FL low 21 9, 10, 11 All ntH 7.5 ns Access time, READY valid from CAS low 22 2cyc/col accesses 9, 10, 11 All tH- 12 ns 3cyc/col accesses 2tH- 8 Provided by IHSNot for ResaleNo reproduction

45、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96791 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Test Symbol

46、 Conditions 1/ -55C TC +125C, unless otherwise specified Group A subgroups Device types Limits Unit Min Max Hold time, CLKOUT high after output valid 23 D(63:0) 9, 10, 11 All ntH 5.6 ns A(31:0), STATUS(5:0), CAS/DQM(7:0) 4/ ntH 5.0 DBEN, DDIN, DSF, RAS, TRG/CAS, W, RL ntH 4.3 Hold time, CLKOUT low a

47、fter output valid 24 D(63:0) 9, 10, 11 All ntH 5.6 ns A(31:0), STATUS(5:0), CAS/DQM(7:0) 4/ ntH 5.0 DBEN, DDIN, DSF, RAS, TRG/CAS, W, RL ntH 4.3 Hold time, output valid after CLKOUT low 25 9, 10, 11 All ntH 5.5 ns Hold time, output valid after CLKOUT high 26 9, 10, 11 All ntH 5.0 ns Hold time, outpu

48、t valid after output valid 27 D(63:0) 9, 10, 11 All ntH 6.5 ns A(31:0), STATUS(5:0), CAS/DQM(7:0) 4/ ntH 6.0 DBEN, DDIN, DSF, RAS, TRG/CAS, W, RL ntH 5.0 Delay time, CLKOUT no longer low to output valid 28 D(63:0) 9, 10, 11 All ntH+ 6.5 ns A(31:0), STATUS(5:0), CAS/DQM(7:0) 4/ ntH+ 5.5 DBEN, DDIN, DSF, RAS, TRG/CAS, W, RL ntH+ 5 Delay time, CLKOUT no longer high to output valid 29 D(63:0) 9, 10, 11 All ntH+ 6.5 ns A(31:0), STATUS(5:0), CAS/DQM(7:0) 4/ ntH+ 5.5 DBEN, DDIN, DSF, RAS, TRG/CAS, W, RL ntH+ 5 Delay time, output no longer valid to CLKOUT high 30 9, 10, 11 All ntH+ 5.0 ns Dela

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