DLA SMD-5962-96900 REV F-2003 MICROCIRCUIT HYBRID MEMORY DUAL DIGITAL SINGLE 128K X 16 BIT STATIC RANDOM ACCESS MEMORY WITH SEPARATE DATA BUS AND SINGLE 128K X 16-BIT FLASH ERASABLT.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes to VOLSand VOHStests for device type 02. 97-09-16 K. A. Cottongim B Table I; Changed ICC1max limit from 250 mA to 310 mA. -sld 98-06-26 K. A. Cottongim C Table I; Changed the SRAM supply current (ICC1) max limit from 310 mA to 360 mA. -sl

2、d 99-08-23 Raymond Monnin D Added case outline 9. Table I; changed the VOLtest condition IOLfrom 12.0 mA to 8.0 mA . Added note to paragraph 1.2.2 and table I regarding the 4 transistor design. -sld 00-09-20 Raymond Monnin E Added case outline Y. Updated drawing to reflect current requirements of MI

3、L-PRF-38534. -sld 03-03-14 Raymond Monnin F Added case outline B. Added note to paragraph 1.2.4. -sld 03-11-10 Raymond Monnin REV SHEET REV F F F F F F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 1

4、2 13 14 PMIC N/A PREPARED BY Gary Zahn DEFENSE SUPPLY CENTER COLUMBUS P. O. BOX 3990 STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones COLUMBUS, OHIO 43216-5000 APPROVED BY Kendall A. Cottongim MICROCIRCUIT, HYBRID, MEMORY, DUAL, DIGITAL, SINGLE 128K x 16 BIT STATIC RANDOM ACCESS MEMORY, WIT

5、H SEPARATE DATA BUS AND SINGLE, 128K x 16-BIT FLASH ERASABLE/PROGRAMMABLE READ ONLY MEMORY WITH SEPARATE DATA BUS THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-01-27 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-96900

6、SHEET 1 OF 28 DSCC FORM 2233 APR 97 5962-E014-04 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96900 DEFENSE SUPPLY CENTER C

7、OLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or

8、 Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 96900 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see

9、 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA devi

10、ce. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 1/ Generic number Circuit function Access time 01 WSF128K16-72Q Single 128K x 16-bit SRAM and 70 ns (SRAM) single 128K x 16-bit Flash EPROM 120 ns (EPROM) each with separate data buses 02 WSF128K16-37Q

11、 Single 128K x 16-bit SRAM and 35 ns (SRAM) single 128K x 16-bit Flash EPROM 70 ns (EPROM) each with separate data buses 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF

12、-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H

13、Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temp

14、erature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). 1/ Due to the nature of the 4 transistor design of the die in these device types, topologically pure testing is important, particularly

15、for high reliability applications. The device manufacturer should be consulted concerning their testing methods and algorithms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96900 DEFENSE SUPPLY CENTER COLU

16、MBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore

17、the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. 1.2.4

18、 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style B See figure 1 68 Ceramic, single cavity, quad flatpack M See figure 1 68 Ceramic, dual cavity, quad flatpack X See figure 1 66 Hex-in-line, single ca

19、vity, with standoffs Y See figure 1 66 Hex-in-line, single cavity, with standoffs 9 1/ See figure 1 68 Co-fired ceramic, single cavity, ultra low profile, quad flatpack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 2/ Supply voltage range (V

20、CC) -0.5 V dc to +7.0 V dc Input voltage range . -0.5 V dc to +7.0 V dc Power dissipation (PD). 1.4 W maximum Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance junction-to-case (JC): Case outline M. 12.8C/W Case outline X 8.7C/W Case outline

21、Y 10.63C/W Case outline B and 9 4.57C/W Data retention (Flash) 10 years minimum Endurance (Flash). 10,000 cycles minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.5 V dc to +0.8 V dc Input high voltage range (VIH) +2.2 V

22、dc to VCC+ 0.3 V dc Output voltage, high minimum (VOH) . +2.4 V dc Output voltage, low maximum (VOL) +0.4 V dc Case operating temperature range (TC) -55C to +125C 1/ Due to the short leads of the case outline 9, caution should be taken if the system application is to be used where extreme thermal tr

23、ansitions can occur. 2/ Stresses above the absolute maximum ratings may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

24、NDARD MICROCIRCUIT DRAWING SIZE A 5962-96900 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of th

25、is drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-

26、38534 - Hybrid Microcircuits, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Microcircuit Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780

27、 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbook are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between

28、the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance req

29、uirements for device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. Therefor

30、e, the tests and inspections herein may not be performed for the applicable device class (see MIL-PRF-38534). Furthermore, the manufacturer may take exceptions or use alternate methods to the tests and inspections herein and not perform them. However, the performance requirements as defined in MIL-P

31、RF-38534 shall be met for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figur

32、e 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4, 5, 6, 7, 8 and 9. Provided by IHSNot for ResaleN

33、o reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96900 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Block diagram(s). The block diagram(s) shall be as specified on figure 10.

34、 3.2.6 Output load circuit. The output load circuit shall be as specified on figure 11. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature

35、range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Programming procedure. The programming procedure shall be as specified by the manufacturer and shall be available

36、 upon request. 3.6 Marking of Device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.7 Data. In addition to the general performance requirements o

37、f MIL-PRF-38534, the manufacturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually teste

38、d, and for those which, if any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.8 Certificate of compliance. A certificate of compliance shall be required from a manufact

39、urer in order to supply to this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-

40、38534 shall be provided with each lot of microcircuits delivered to this drawing. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for the initial characterization and after any design process changes w

41、hich may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall b

42、e made available upon request of the acquiring or preparing activity. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design process change which may affect data reten

43、tion. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing ac

44、tivity. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96900 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteri

45、stics. Limits Test Symbol Conditions 1/ 2/ -55C TC+125C unless otherwise specified Group A subgroups Device types Min Max Unit DC parameters. SRAM supply current ICC1SCS = VIL, OE = FCS = VIH, VCC= 5.5 V dc, f = 5 MHz1,2,3 All 360 mA Flash supply current for read only ICC2FCS = VIL, OE = SCS = VIH,

46、VCC= 5.5 V dc, f =5 MHz 1,2,3 All 100 mA Flash supply current for program or erase ICC3FCS = VIL, OE = SCS = VIH, VCC= 5.5 V dc, f =5 MHz 1,2,3 All 130 mA Standby current ISBFSC = SCS = VIL, OE = VIH, VCC= 5.5 V dc, f =5 MHz 1,2,3 All 40 mA Input leakage current ILIVIN= VSSto VCC1,2,3 All 10 A Outpu

47、t leakage current ILOSCS = FCS = VIH, OE = VIH, VOUT= VSSto VCC1,2,3 All 10 A Input low voltage VIL1,2,3 All 0.8 V Input high voltage VIH 1,2,3 All 2.2 V SRAM output low voltage VOLSFCS = VIH, IOL= 2.1 mA, VCC = 4.5 V 1,2,3 All 0.4 V SRAM output high voltage VOHSFCS = VIH, IOL= -1.0 mA, VCC = 4.5 V

48、1,2,3 All 2.4 V Flash ouput low voltage VOLFSCS = VIH, IOL= 8.0 mA, VCC = 4.5 V 1,2,3 01 0.45 V Flash output high voltage VOHFSCS = VIH, IOL= -2.5 mA, VCC = 4.5 V 1,2,3 01 0.85 x VCCV See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96900 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Sy