DLA SMD-5962-97530 REV A-2012 MICROCIRCUIT DIGITAL 1394-1995 GENERAL PURPOSE LINK-LAYER CONTROLLER TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. -rrp 12-04-04 C. SAFFLE REV SHEET REV A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 P

2、MIC N/A PREPARED BY RAJESH PITHADIA DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY RAJESH PITHADIA APPROVED BY RAYMOND MONNIN MICROCIRCUIT,

3、DIGITAL, 1394-1995 GENERAL PURPOSE LINK-LAYER CONTROLLER, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 98-04-20 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97530 SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E300-12 Provided by IHSNot for ResaleNo reproduction or networking p

4、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device cl

5、asses Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in t

6、he following example: 5962 - 97530 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet t

7、he MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The dev

8、ice type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 TSB12LV31M 1394-1995 general purpose link-layer controller 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device cla

9、ss Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as d

10、esignated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X see figure 1 100 Ceramic quad flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided b

11、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.

12、5 V dc to +4.0 V dc Supply voltage range (VCC5 V) . -0.5 V dc to +5.5 V dc DC input voltage range (VIN) -0.5 V dc to VCC5 V+0.5 V dc DC output voltage range (VO) . -0.5 V dc to VCC5 V+0.5 V dc DC input clamp current (IIK) (VIN5 V_VCC) . 20 mA DC output clamp current (IOK) (VOUT5 V_VCC) . 20 mA Maxim

13、um power dissipation at TA= 25C (in still air) 2404 mW 4/ Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-ambient (JA) 52C/W Thermal resistance, junction-to-case(JC) 8C/W Junction temperature (TJ) +150C 1.4 Recommended o

14、perating conditions. 2/ 3/ 5/ Supply voltage (VCC) . +3.0 V dc to +3.6 V dc Supply voltage (VCC5 V) +4.5 V dc to +5.5 V dc 6/ Minimum high level input voltage (VIH ) +2 V dc to VCC5 V Maximum low level input voltage (VIL) 0 V to +0.8 V dc Input voltage range (VIN) 0 V to +5.5 V dc Output voltage ran

15、ge (VOUT). 0 V to +3.6 V dc Maximum clock frequency (BCLK & SCLK) 50 MHz Ambient operating temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the ext

16、ent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Metho

17、d Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.

18、dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect r

19、eliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and ambient temperature range of -55C to +125C. 4/ The maximum package power dissipation is calculated using a junction temperatur

20、e of 150C. 5/ Unused inputs must be held high or low to prevent them from floating. 6/ VCC5V terminal provides a bias for each pins upper clamp protection diode. Its value is 3.3V 0.3V in a 3-V only system. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

21、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes pre

22、cedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein o

23、r as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B

24、 devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case

25、 outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Timing diagrams. The timing diagrams shall be as specified on figure

26、 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 E

27、lectrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. F

28、or packages where marking of the entire SMD PIN is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance w

29、ith MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as r

30、equired in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of complian

31、ce shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers

32、 product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device

33、 class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this draw

34、ing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation.

35、Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reprod

36、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Test conditions 1/ -55C TA +125C +3.

37、0 V 3.3V_VCC +3.6 V Device type Group A subgroups Limits Unit (unless otherwise specified) Min Max High level output voltage VOHIOH= -12 mA , VCC= 3.0 V 2/ 01 1, 2, 3 2.4 V IOH = -8 mA, VCC= 3.0 V 3/ 2.4 Low level output voltage VOLIOH= 12 mA, VCC= 3.0 V 2/ 01 1, 2, 3 0.4 V IOH= 8 mA, VCC= 3.0 V 3/

38、0.4 Input current high IIHVIN= VCC, VCC= 3.6 V 01 1,2,3 1 A Input current low IILVIN= 0 V, VCC= 3.6 V 01 1, 2, 3 -1 A Three-State Output Leakage Current IOZVIN= 0.0 V or 3.6 V, VCC= 3.0 V 01 1,2, 3 20 A Microcontroller Write Timing Setup time, MD0-MD31, MA0-MA7, MWR , and MCS valid before BCLK high

39、tsu1See figure 4 01 9 9.6 ns Hold time, BCLK high before MD0-MD31, MA0-MA7, MWR , and XMCS invalid th1See figure 4 01 9 1.2 ns Delay time, BCLK high to MCA td1See figure 4 01 9 3.6 11.4 ns Microcontroller Read Timing Delay time, BCLK high to MD0 - MD15 td2See figure 4 01 9 3.7 13.6 ns See footnotes

40、at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteri

41、stics - Continued. Test Symbol Test conditions 1/ -55C TA +125C +3.0 V 3.3V_VCC +3.6 V Device type Group A subgroups Limits Unit (unless otherwise specified) Min Max IsoPort Timing Phases 1, 2, and 3 Setup time, ISD0 - ISDO7 valid before ISOCK high tsu2 See figure 4 01 9 14 ns Setup time, IDATARDY h

42、igh before ISOCK high tsu3See figure 4 01 9 14 ns Hold time, ISOCK high before ISOD0 - ISOD7 th2See figure 4 01 9 0 ns Delay time, ISOCK high to ISORST, ISORW td3See figure 4 01 9 2.8 14.1 ns Delay time, ISOCK high to IDMDONE low td4See figure 4 01 9 2.2 6.5 ns IsoPort Receive Timing Hold time, ISOC

43、K high to ISODn, PKTFLAG low th3See figure 4 01 9 2.4 ns Delay time, ISOCK high to ISODn, PKTFLAG high td5See figure 4 01 9 14 ns Delay time, ISOCK high to ISOERROR td6See figure 4 01 9 2.3 6.8 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

44、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions 1/ -55C TA +125C +3.0 V 3.3V_VCC +3.6 V De

45、vice type Group A subgroups Limits Unit (unless otherwise specified) Min Max Link Read/Write Timing Setup time, CTLn, D0 - D3 high before SCLK high tsu4See figure 4 01 9 6 ns Hold time, SCLK high to CTLn, D0 - D3 low th4See figure 4 01 9 1 ns Delay time, SCLK high to CTLn, D0 - D3, LREQ td7See figur

46、e 4 01 9 3.8 15.16 ns Synchronous ISOCK Output Timing Delay time, ISOCK high to STAT0, STAT1 td8See figure 4 01 9 2.8 19.5 ns Delay time, ISOCK high to MARXD, MIRXD td9See figure 4 01 9 2.9 19.1 ns Delay time, ISOCK high to CYSTART, CYDONE td10See figure 4 01 9 3 12.9 ns Delay time, ISOCK high to IN

47、T td11See figure 4 01 9 1.4 3.8 ns 1/ Each input/output, as applicable, shall be tested at the specified supply voltage and temperature, for the specified limits, to the tests in table I herein. Timing parameters are not production tested and ensured by design at TA= 25C only. 2/ Terminals: 27-30, 3

48、2, 33, 35, 57-60, 63-65, 67-70, 72-74, 77, 78, and 84. 3/ Terminals: All other outputs. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97530 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 Symbol Inches Millimeters Min Max Min Max A .160 4.07 A1 .140 NOM 3.56 NOM A2 .010 0.25 b .010 TYP 0.25 TYP c .006 NOM 0.16 NOM D(E