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本文(DLA SMD-5962-97561 REV A-2006 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL TRIPLE 3-INPUT POSITIVE AND GATES MONOLITHIC SILICON《三重3输入阳性与门晶体管硅单片电路数字双极微电路》.pdf)为本站会员(fatcommittee260)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-97561 REV A-2006 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL TRIPLE 3-INPUT POSITIVE AND GATES MONOLITHIC SILICON《三重3输入阳性与门晶体管硅单片电路数字双极微电路》.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 06-11-08 Raymond Monnin REV SHET REV SHET REV STATUS REV A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Tuan Nguyen DEFENSE SUPPLY CENTER C

2、OLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Larry Shaw COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY,TTL, TRIPLE 3-INPUT POSITIVE AND AND AGENCIES OF THE DEPARTME

3、NT OF DEFENSE DRAWING APPROVAL DATE 97-05-30 GATES, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97561 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E544-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT

4、DRAWING SIZE A 5962-97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class

5、V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 97561 01 Q C X Federa

6、l stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked

7、 with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows

8、: Device type Generic number Circuit function 01 54AS11 Triple 3-input positive-AND gates 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to th

9、e requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive d

10、esignator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack 2 CQCC1-N20 20 Leadless square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M.

11、 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage r

12、ange (VCC) -0.5 V dc to +7.0 V dc Input voltage (VIN) -0.5 V dc to +7.0 V dc Operating free air temperature range -55 C to +125 C Maximum power dissipation (PD) . 99 mW Storage temperature range -65 C to +150 C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +1

13、75 C 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc High-level input voltage (VIH) . 2.0 V min Low-level input voltage (VIL) 0.8 V max High-level output current (IOH) -2 mA max Low-level output current (IOL) . 20 mA max Case operating temperature range (TC) . -

14、55 C to +125 C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitati

15、on or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEF

16、ENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, B

17、uilding 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific e

18、xemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

19、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 an

20、d as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A fo

21、r non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1

22、 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figu

23、re 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradia

24、tion parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Markin

25、g. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA pr

26、oduct using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device cl

27、asses Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufac

28、turer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to

29、DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of co

30、nformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notificati

31、on to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manuf

32、acturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 8 (see MIL-PRF-38

33、535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance c

34、haracteristics. Test Symbol Conditions -55 C TC +125C Group A subgroups Limits 1/ Unit unless otherwise specified Min Max Input clamp voltage VIKVCC= 4.5 V, II= -18 mA 1, 2, 3 -1.2 V High level output voltage VOHVCC= 4.5 V to 5.5 V, IOH= -2 mA 1, 2, 3 VCC-2 V Low-level output voltage VOLVCC= 4.5 V,

35、IOL= 20 mA 1, 2, 3 0.5 V Input current at maximum input voltage IIVCC= 5.5 V, VI= 7.0 V 1, 2, 3 0.1 mA High-level input current IIHVCC= 5.5 V, VI= 2.7 V 1, 2, 3 20 A Low-level input current IILVCC= 5.5 V, VI= 0.4 1, 2, 3 -0.5 mA Output current IO 2/ VCC= 5.5 V , VO= 2.25 V 1, 2, 3 -30 -112 mA Supply

36、 current, all outputs high ICCH VCC= 5.5 V, VI= 4.5 V 1, 2, 3 7 mA Supply current, all outputs low ICCL VCC= 5.5 V, VI= 0 V 1, 2, 3 18 mA Functional test VIN= VIHmin or VILmax Verify output VO, See 4.4.1b 7, 8 mA Propagation delay time, from A, B, or C input to Y output tPLHSee figure 4 9, 10, 11 1

37、6.5 ns tPHL9, 10, 11 1 6.5 ns 1/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively, and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limit

38、s, as applicable, listed herein. 2/ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DR

39、AWING SIZE A 5962-97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outlines C, D 2 Terminal number Terminal symbol 1 1A NC 2 1B 1A 3 2A 1B 4 2B 2A 5 2C NC 6 2Y 2B 7 GND NC 8 3Y 2C 9 3A 2Y 10 3B GND 11 3C NC 12 1Y 3Y 13

40、1C 3A 14 VCC3B 15 NC 16 3C 17 NC 18 1Y 19 1C 20 VCCFIGURE 1. Terminal connections. INPUTS OUTPUT A B C Y H H H H L X X L X L X L X X L L FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-

41、97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. NOTES: 1. CLincludes probe and jig capacitance. FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted

42、without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97561 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in

43、 accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, a

44、ppendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and sha

45、ll be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shal

46、l be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters s

47、hall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circ

48、uit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for devi

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