1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 06-11-08 Raymond Monnin REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry E. Shaw DEFENSE SUP
2、PLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tuan D. Nguyen COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Ray L. Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, OCTAL D-TYPE AND AGENCIES OF THE DEPARTME
3、NT OF DEFENSE DRAWING APPROVAL DATE 97-03-28 EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97562 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E545-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without li
4、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q an
5、d M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the follow
6、ing example: 5962 - 97562 01 Q R X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-
7、38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s)
8、 identify the circuit function as follows: Device type Generic number Circuit function 01 54AS374 Octal D-type edge-triggered flip- flops with 3-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device clas
9、s Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as de
10、signated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device c
11、lasses Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FOR
12、M 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . 7.0 V dc DC input voltage . 7.0 V dc Voltage applied to a disabled 3-state output . 5.5 V dc Storage temperature range . -65C to +150C Operating free-air temperature range (TA) -55C to 125C Maximum power dissipation (PD) 704
13、 mW Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) +2.0 V Maximum low level input voltage (VIL) . +0.7 V Maximum high level out
14、put current (IOH) . -12 mA Maximum low level output current (IOL) . +32 mA Case operating temperature range (TC) . -55C to +125C Minimum setup time, data before CLK (ts) . 3 ns Minimum hold time, data after CLK (th) 3 ns Minimum pulse duration, (tw): CLK high . 5.5 ns CLK low . 3 ns Maximum clock fr
15、equency, (fclock) . 100 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in t
16、he solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPA
17、RTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robb
18、ins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless
19、 a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without lic
20、ense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL
21、-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535,
22、appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device c
23、lass M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Test circuit and switching waveforms. The test
24、circuit and switching waveforms shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall
25、 apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 here
26、in. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be
27、marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PR
28、F-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawin
29、g (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply fo
30、r this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for dev
31、ice classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involvi
32、ng devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Of
33、fshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 10 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduc
34、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C G
35、roup A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V to 5.5 V 2/ IOH= -2 mA 1, 2, 3 VCC- 2 V VCC= 4.5 V 2/ IOH= -12 mA 2.4 Low level output voltage VOLVCC= 4.5 V 2/ IOL= 32 mA 1, 2, 3 0.5 V Input clamp voltage VIKVCC= 4.5 V II= -18 mA 1, 2, 3 -1.2 V
36、 High level input current IIHVCC= 5.5 V VI= 2.7 V 1, 2, 3 20 A Low level input current IILVCC= 5.5 V Data 1, 2, 3 -3 mA VI= 0.4 V All others 3/ -0.5 Input current IIVCC= 5.5 V VI= 7.0 V 1, 2, 3 0.1 mA Output current IOVCC= 5.5 V 4/ VO= 2.25 V 1, 2, 3 -30 -112 mA Supply current ICCHVCC= 5.5 V Outputs
37、 high 1, 2, 3 120 mA ICCLOutputs low 128 ICCZOutputs disabled 128 Off-state output leakage current IOZHVCC= 5.5 V VO= 2.7 V 1, 2, 3 50 A IOZLVCC= 5.5 V VO= 0.4 V 1, 2, 3 -50 A Functional tests See 4.4.1b, VCC= 4.5 V, 5.5 V 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduct
38、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C
39、 TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Clock frequency fMAX VCC= 4.5 V to 5.5 V, CL= 50 pF, 9, 10, 11 100 MHz Propagation delay time tPLHR1= 500 , R2= 500 9, 10, 11 3 11 ns CLK to any Q tPHL5/ 4 11.5 Output enable time, tPZH9, 10, 11 2 7 ns OE to any Q tPZL3 11 Ou
40、tput disable time, tPHZ9, 10, 11 2 10 ns OE to any Q tPLZ2 7 1/ Unused inputs that do not directly control the pin under test must be put at +2.5 V or - 0.4 V. No unused inputs shall exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 2/ All outputs must be tested. In the case where only
41、 one input at VILmaximum or VIHminimum produces the proper state, the test must be performed with each input being selected as the VILmaximum or VIHminimum input. 3/ All others = OE , CLK. 4/ The output conditions have been chosen to produce a current that closely approximates one half of the true s
42、hort circuit output current, IOS. Not more than one output will be tested at one time and duration of the test condition shall not exceed one second. 5/ Propagation delay limits are based on single output switching. Unused inputs = 3.5 V or -0.3 V. Provided by IHSNot for ResaleNo reproduction or net
43、working permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines R, S, and 2 Terminal number Terminal symbol 1 OE 2 1Q 3 1D 4 2D 5 2Q 6 3
44、Q 7 3D 8 4D 9 4Q 10 GND 11 CLK 12 5Q 13 5D 14 6D 15 6Q 16 7Q 17 7D 18 8D 19 8Q 20 VCCFIGURE 1. Terminal connections. INPUTS OUTPUT OE CLK D Q L H H L L L L H or L X Q0H X X Z FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STAN
45、DARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 See notes at end of FIGURE 3. FIGURE 3. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted witho
46、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses are supplied by generators having the following characte
47、ristics: PRR 1 MHz, tr= tf 2.5 ns, duty cycle = 50%. 3. When measuring propagation delay times of 3-state outputs, switch S1 is open. 4. The outputs are measured one at a time with one transition per measurement. 5. Waveform 1 is for an output with internal conditions such that the output is low exc
48、ept when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. FIGURE 3. Test circuit and switching waveforms - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97562 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 4. VER
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