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本文(DLA SMD-5962-99589 REV C-2001 MICROCIRCUIT DIGITAL-LINEAR 384-CHANNEL 256-GRADATION COLOR THIN FILM TRANSISTOR (TFT) LCD SOURCE DRIVER MONOLITHIC SILICON《微型电路 数字线型 384通道 256渐变色彩薄膜晶.pdf)为本站会员(livefirmly316)主动上传,麦多课文库仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。 若此文所含内容侵犯了您的版权或隐私,请立即通知麦多课文库(发送邮件至master@mydoc123.com或直接QQ联系客服),我们立即给予删除!

DLA SMD-5962-99589 REV C-2001 MICROCIRCUIT DIGITAL-LINEAR 384-CHANNEL 256-GRADATION COLOR THIN FILM TRANSISTOR (TFT) LCD SOURCE DRIVER MONOLITHIC SILICON《微型电路 数字线型 384通道 256渐变色彩薄膜晶.pdf

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make changes to VINin 1.3, VO, VAVE, ICHG, and IDIStests in table I, figure 2, and figure 3. - ro 00-12-21 R. MONNIN B Make changes in 1.3, 1.4, VIL1, ICHG, IDIS, VO, VAVE, and VOUTtests in table I. -rrp 01-06-28 R. MONNIN C Add footnote 3/ in 1.

2、4. -rrp 01-11-28 R. MONNIN REV SHET REV C C C C C SHEET 15 16 17 18 19 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY RAJESH PITHADIA COLUMBUS, OHIO

3、43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY RAYMOND MONNIN MICROCIRCUIT, DIGITAL-LINEAR, 384-CHANNEL, 256-GRADATION COLOR THIN FILM AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 00-03-23 TRANSISTOR (TFT) LCD SOURCE DRIVER, MONOLITHI

4、C SILICON AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-99589 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E082-02 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

5、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space applic

6、ation (device class V). In addition for TAB devices, the requirements of appendix F, “General provisions for TAB microcircuits” shall be met. A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Har

7、dness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 99589 01 Q X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3)

8、 / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropri

9、ate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 MPT57571 384-channel, 256-gradation color thin film transistor (TFT) LCD source driver 1.2.3 Device class desig

10、nator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, ap

11、pendix A and appendix F of MIL-PRF-38535. Q or V Certification and qualification to MIL-PRF-38535 and appendix F of MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See manufactu

12、rers 464 Environmentally protected tape automated altered item drawing bond 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 and appendix F for device classes Q and V or MIL-PRF-38535, appendix A and appendix F for device class M. Provided by IHSNot for ResaleNo reproduction or ne

13、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Power supply voltage VDD1-0.5 V to +14.0 V VDD2-0.5 V to +5.0 V

14、Input voltage (VIN): GMA1 GMA16 .-0.5 V VDD1+ 0.5 V Digital voltage.-0.5 V VDD2+ 0.5 V Output voltage (VOUT): EI01 EI02 -0.5 V VDD2+ 0.5 V OUT1 OUT 384 .-0.5 V VDD1+ 0.5 V Storage temperature range .-55C to +125C 1.4 Recommended operating conditions. 3/ Operating power supply voltage: VDD1+8.5 V to

15、+13.5 V VDD2+2.5 V to +3.6 V correction potential: 4/ VGMA(1-8)input capacity VDD1to VDD1 0.3 V VGMA(9-16)input capacity VSS1+ 0.3 V to VDD1Clock frequency (fCLK): 2.5 V VDD2GMA1, GMAn GMAn+1, GMA16 VSS1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

16、-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Out

17、lines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Aven

18、ue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a speci

19、fic exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535, and appendix F MIL-PRF-38535 “General provisions for TAB microcircuits”, and as specified herein or as modified in the device

20、 manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and Appendix F as

21、specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix F of MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A, appendix F and herein for device class M. 3.2

22、.1 Pin functions. The pin functions shall be as specified on figure 1. 3.2.2 Block diagram. The block diagram shall be as specified on figure 2. 3.2.3 correction reference. The correction reference shall be as specified on figure 3. 3.2.4 Switching diagram. The switching diagram shall be as specifie

23、d on figure 4. 3.3 AID requirements. All AIDs written against this SMD shall be sent to DSCC-VA. The following items shall be provided to the device manufacturer by the customer as part of an AID. 3.3.1 Case outline. The case outline shall be in accordance with the manufacturers altered item drawing

24、. 3.3.2 Terminal connections and pin assignments. 3.3.3 Package type (see 1.2.4). 3.3.4 Functional description terms and symbols. 3.3.5 Logic diagram (or equivalent structural VHDL description or mutually agreed to net list). 3.3.6 Design tape number or Design document name (i.e., net list). 3.3.7 D

25、esign functional tape number or name. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.3.8 Test f

26、unctional tape number or name. 3.3.9 Fault coverage measurement of manufacturing logic tests. 3.3.10 Burn-in circuit. 3.3.11 ESD class and voltage. 3.3.12 Device electrical performance characteristics (additions to Table I). Device electrical performance characteristics shall include dc parametric,

27、functional, ac parameters and any other data which would be considered required by a design engineer. All electrical performance characteristics apply over the full recommended ambient operating temperature range and specified test load conditions. 3.3.13 Maximum power dissipation. Maximum power dis

28、sipation shall be in accordance with the application specific design. 3.4 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation parameter limits are as specified in table I and

29、shall apply over the full ambient operating temperature range. 3.5 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.6 Marking. The part shall be marked with the PIN listed in

30、1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option,

31、the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535 and appendix F MIL-PRF-38535 (see 3.1 herein). Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A and appendix F of MIL-PRF-38535. The AID number shall

32、 be added to the marking by the manufacturer. 3.6.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML” or “Q” as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.7 Certificate o

33、f compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be

34、 listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-

35、38535 and appendix F of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and appendix F of MIL-PRF-38535 and herein. 3.8 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M

36、 in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.9 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any ch

37、ange as defined in MIL-PRF-38535, appendix A 3.10 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available

38、 onshore at the option of the reviewer. 3.11 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 55 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license

39、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Group A subgroups Device type Limits Unit Conditions -55C TA +125C VSS1=

40、VSS2= 0 V unless otherwise specified Min Max Analog consumed current (during operation) DIdd1 1/, 2/, 3/, 4/ 1,2,3 01 22 mA Analog consumed current (during standby) SIdd1 2/, 3/, 4/, 6/ 1,2,3 01 18 mA Digital consumed current (during operation) DIdd2 1/, 5/ 1,2,3 01 5 mA Digital consumed current (du

41、ring standby) SIdd2 6/ 1,2,3 01 100 A High level input voltage for D00-D07, D10-D17, D20-D27, D30-D37, D40-D47, D50-D57, CLK TP1, LP, RS, EI01, EI02, L /R, REV1, REV2, POL, SHC VIH11,2,3 01 0.7 xVDD2 VDD2 V Low level input voltage for D00-D07, D10-D17, D20-D27, D30-D37, D40-D47, D50-D57, CLK TP1, LP

42、, RS, EI01, EI02, L /R, REV1, REV2, POL, SHC VIL11,2,3 01 0 0.25 xVDD2 V Input leakage current for D00-D07, D10-D17, D20-D27, D30-D37, D40-D47, D50-D57, CLK TP1, LP, RS, EI01, EI02, L /R, REV1, REV2, POL, SHC IL111,2,3 01 -1 1 A Output charge current for 7/ OUT1-OUT384 ICHGVX = Vdd1 0.3 V, VO = VX 1

43、.0 V, RS = L 1,2,3 01 -30 A Output discharge current for 7/ OUT1-OUT384 IDISVX = Vss1 + 0.3 V, VO = VX + 1.0 V, RS = L 1,2,3 01 30 A Deviation between output 8/ voltage pins OUT1-OUT384 VOVOUT= Vdd1 0.3 V to Vss1 + 0.3 V 1,2,3 01 -20 20 mV Average output variation 9/ for OUT1-OUT384 VAVEVOUT= Vdd1 0

44、.3 V to Vss1 + 0.3 V 1,2,3 01 -15 15 mV See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 7 D

45、SCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Group A subgroups Device type Limits Unit Conditions -55C TA +125C VSS1= VSS2= 0 V unless otherwise specified Min Max Output voltage range 10/ for OUT1 OUT384 VOUT1,2,3 01 VSS1+ 0.3 VDD1 0.3 V 1/ The TP1 inte

46、rval is 20 s, fCLK= 36 MHz. 2/ When no load. 3/ VDD1= 13.5 V 4/ Test pattern is a black raster, GMA1 = 13.2 V, GMA16 = 0.3 V 5/ Test pattern is checkered dot pattern. 6/ Clock and input signal are in the stopped state. 7/ Vx is the output voltage of OUT1 OUT384. VOis the voltage applied at OUT1 OUT3

47、84. 8/ Deviation between terminals with differences in positive and negative amplitudes, when all chip outputs display the same data. 9/ Inter-chip variation in the average of the output voltage inter-pin deviation (VO). 10/ VOUTis the output voltage of analog output terminals OUT1 OUT384. Provided

48、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-99589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Pin(s) I/O Description Function D00 D07 Input Port 1 Image signal input terminal D10 D17 Image signal input terminal Inputs image signals with a 48-bit width D20 D27 (8-bit gradation data x 6 dots (for 2 pixels). D

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