EN 60749-26-2014 en Semiconductor devices - Mechanical and climatic test methods - Part 26 Electrostatic discharge (ESD) sensitivity testing - Human body model (HBM).pdf

1、BSI Standards PublicationSemiconductor devices Mechanical and climatic test methodsPart 26: Electrostatic discharge (ESD) sensitivity testing Human body model (HBM)BS EN 60749-26:2014National forewordThis British Standard is the UK implementation of EN 60749-26:2014. It isidentical to IEC 60749-26:2

2、013. It supersedes BS EN 60749-26:2006 which iswithdrawn.The UK participation in its preparation was entrusted to TechnicalCommittee EPL/47, Semiconductors.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publication does not purport to include al

3、l the necessary provisions ofa contract. Users are responsible for its correct application. The British Standards Institution 2014.Published by BSI Standards Limited 2014ISBN 978 0 580 76099 0ICS 31.080.01Compliance with a British Standard cannot confer immunity fromlegal obligations.This British St

4、andard was published under the authority of theStandards Policy and Strategy Committee on 30 June 2014.Amendments/corrigenda issued since publicationAmd. No. Date Text affectedBRITISH STANDARDBS EN 60749-26:2014EUROPEAN STANDARD NORME EUROPENNE EUROPISCHE NORM EN 60749-26 May 2014 ICS 31.080.01 Supe

5、rsedes EN 60749-26:2006 English Version Semiconductor devices - Mechanical and climatic test methods - Part 26: Electrostatic discharge (ESD) sensitivity testing - Human body model (HBM) (IEC 60749-26:2013) Dispositifs semiconducteurs - Mthodes dessais mcaniques et climatiques - Partie 26: Essai de

6、sensibilit aux dcharges lectrostatiques (DES) - Modle du corps humain (HBM) (CEI 60749-26:2013) Halbleiterbauelemente - Mechanische und klimatische Prfverfahren - Teil 26: Prfung der Empfindlichkeit gegen elektrostatische Entladungen (ESD) - Human Body Model (HBM) (IEC 60749-26:2013) This European S

7、tandard was approved by CENELEC on 2014-04-14. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references conc

8、erning such national standards may be obtained on application to the CEN-CENELEC Management Centre or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC m

9、ember into its own language and notified to the CEN-CENELEC Management Centre has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Repu

10、blic of Macedonia, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United Kingdom. European Committee for Electrotechnical Standardizati

11、on Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels 2014 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members. Ref. No. EN 60749-26:2014

12、E BS EN 60749-26:2014EN 60749-26:2014 - 2 - Foreword This document (EN 60749-26:2014) consists of the text of IEC 60749-26:2013 prepared by IEC/TC 47 “Semiconductor devices“, in collaboration with Technical Committee 101. The following dates are fixed: latest date by which the document has to be imp

13、lemented at national level by publication of an identical national standard or by endorsement (dop) 2015-04-14 latest date by which the national standards conflicting with the document have to be withdrawn (dow) 2017-04-14 This document supersedes EN 60749-26:2006. EN 60749-26:2014 includes the foll

14、owing significant technical changes with respect to EN 60749-26:2006: a) descriptions of oscilloscope and current transducers have been refined and updated; b) the HBM circuit schematic and description have been improved; c) the description of stress test equipment qualification and verification has

15、 been completely re-written; d) qualification and verification of test fixture boards has been revised; e) a new section on the determination of ringing in the current waveform has been added; f) some alternate pin combinations have been included; g) allowance for non-supply pins to stress to a limi

16、ted number of supply pin groups (associated non-supply pins) and allowance for non-supply to non-supply (i.e., I/O to I/O) stress to be limited to a finite number of 2 pin pairs (coupled non-supply pin pairs); h) explicit allowance for HBM stress using 2 pin HBM testers for die only shorted supply g

17、roups. Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CENELEC and/or CEN shall not be held responsible for identifying any or all such patent rights. Endorsement notice The text of the International Standard IEC 60749-26:2013 was

18、 approved by CENELEC as a European Standard without any modification. BS EN 60749-26:2014- 3 - EN 60749-26:2014 Annex ZA (normative) Normative references to international publications with their corresponding European publications The following documents, in whole or in part, are normatively referen

19、ced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. NOTE 1 When an International Publication has been modified by common modific

20、ations, indicated by (mod), the relevant EN/HD applies. NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here: www.cenelec.eu Publication Year Title EN/HD Year IEC 60749-27 - Semiconductor devices - Mechanical and climatic test methods

21、- Part 27: Electrostatic discharge (ESD) sensitivity testing - Machine model (MM) EN 60749-27 - BS EN 60749-26:2014 2 60749-26 IEC:2013 CONTENTS 1 Scope . 6 2 Normative references . 6 3 Terms and definitions . 6 4 Apparatus and required equipment . 9 4.1 Waveform verification equipment . 9 4.2 Oscil

22、loscope 10 4.3 Additional requirements for digital oscilloscopes 10 4.4 Current transducer (inductive current probe) . 10 4.5 Evaluation loads 10 4.6 Human body model simulator 10 4.7 HBM test equipment parasitic properties . 11 5 Stress test equipment qualification and routine verification . 11 5.1

23、 Overview of required HBM tester evaluations 11 5.2 Measurement procedures 11 5.2.1 Reference pin pair determination . 11 5.2.2 Waveform capture with current probe 12 5.2.3 Determination of waveform parameters 12 5.2.4 High voltage discharge path test 15 5.3 HBM tester qualification 15 5.3.1 HBM ESD

24、 tester qualification requirements . 15 5.3.2 HBM tester qualification procedure 15 5.4 Test fixture board qualification for socketed testers . 16 5.5 Routine waveform check requirements 17 5.5.1 Standard routine waveform check description 17 5.5.2 Waveform check frequency 17 5.5.3 Alternate routine

25、 waveform capture procedure . 18 5.6 High voltage discharge path check 18 5.6.1 Relay testers . 18 5.6.2 Non-relay testers . 18 5.7 Tester waveform records . 18 5.7.1 Tester and test fixture board qualification records 18 5.7.2 Periodic waveform check records 18 5.8 Safety 19 5.8.1 Initial set-up 19

26、 5.8.2 Training . 19 5.8.3 Personnel safety 19 6 Classification procedure . 19 6.1 Devices for classification . 19 6.2 Parametric and functional testing 19 6.3 Device stressing 19 6.4 Pin categorization 20 6.4.1 General . 20 6.4.2 No connect pins . 20 6.4.3 Supply pins 20 6.4.4 Nonsupply pins 21 BS

27、EN 60749-26:201460749-26 IEC:2013 3 6.5 Pin groupings 21 6.5.1 Supply pin groups 21 6.5.2 Shorted non-supply pin groups 22 6.6 Pin stress combinations . 22 6.6.1 Pin stress combination categorisation 22 6.6.2 Non-supply and supply to supply combinations (1, 2, N) 24 6.6.3 Non-supply to non-supply co

28、mbinations . 25 6.7 Testing after stressing . 26 7 Failure criteria 26 8 Component classification 26 Annex A (informative) HBM test method flow chart . 27 Annex B (informative) HBM test equipment parasitic properties . 30 Annex C (informative) Example of testing a product using Table 2, Table 3, or

29、Table 2 with a two-pin HBM tester . 34 Annex D (informative) Examples of coupled non-supply pin pairs . 40 Figure 1 Simplified HBM simulator circuit with loads 11 Figure 2 Current waveform through shorting wires . 13 Figure 3 Current waveform through a 500 resistor 14 Figure 4 Peak current short cir

30、cuit ringing waveform 15 Figure B.1 Diagram of trailing pulse measurement setup 30 Figure B.2 Positive stress at 4 000 V . 31 Figure B.3 Negative stress at 4 000 V 31 Figure B.4 Illustration of measuring voltage before HBM pulse with a Zener diode or a device 32 Figure B.5 Example of voltage rise be

31、fore the HBM current pulse across a 9,4 V Zener diode 32 Figure C.1 Example to demonstrate the idea of the partitioned test 35 Table 1 Waveform specification . 17 Table 2 Preferred pin combinations sets 23 Table 3 Alternative pin combinations sets 24 Table 4 HBM ESD component classification levels .

32、 26 Table C.1 Product testing in accordance with Table 2 36 Table C.2 Product testing in accordance with Table 3 37 Table C.3 Alternative product testing in accordance with Table 2 . 38 BS EN 60749-26:2014 6 60749-26 IEC:2013 SEMICONDUCTOR DEVICES MECHANICAL AND CLIMATIC TEST METHODS Part 26: Electr

33、ostatic discharge (ESD) sensitivity testing Human body model (HBM) 1 Scope This standard establishes the procedure for testing, evaluating, and classifying components and microcircuits according to their susceptibility (sensitivity) to damage or degradation by exposure to a defined human body model

34、(HBM) electrostatic discharge (ESD). The purpose (objective) of this standard is to establish a test method that will replicate HBM failures and provide reliable, repeatable HBM ESD test results from tester to tester, regardless of component type. Repeatable data will allow accurate classifications

35、and comparisons of HBM ESD sensitivity levels. ESD testing of semiconductor devices is selected from this test method, the machine model (MM) test method (see IEC 60749-27) or other ESD test methods in the IEC 60749 series. The HBM and MM test methods produce similar but not identical results; unles

36、s otherwise specified, this test method is the one selected. 2 Normative references The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the l

37、atest edition of the referenced document (including any amendments) applies. IEC 60749-27, Semiconductor devices Mechanical and climatic test methods Part 27: Electrostatic discharge (ESD) sensitivity testing Machine model (MM) 3 Terms and definitions For the purposes of this document, the following

38、 terms and definitions apply. 3.1 associated non-supply pin non-supply pin (typically an I/O pin) associated with a supply pin group Note 1 to entry: A non-supply pin is considered to be associated with a supply pin group if either: a) The current from the supply pin group (i.e., VDDIO) is required

39、for the function of the electrical circuit(s) (I/O driver) that connect (high/low impedance) to that non-supply pin. b) A parasitic path exists between non-supply and supply pin group (e.g., open-drain type non-supply pin to a VCC supply pin group that connects to a nearby N-well guard ring). 3.2 co

40、mponent item such as a resistor, diode, transistor, integrated circuit or hybrid circuit BS EN 60749-26:201460749-26 IEC:2013 7 3.3 component failure condition in which a tested component does not meet one or more specified static or dynamic data sheet parameters 3.4 coupled non-supply pin pair two

41、pins that have an intended direct current path (such as a pass gate or resistors, such as differential amplifier inputs, or low voltage differential signaling (LVDS) pins), including analogue and digital differential pairs and other special function pairs (e.g., D+/D-, XTALin/XTALout, RFin/RFout, Tx

42、P/TxN, RxP/RxN, CCP_DP/CCN_DN etc.) 3.5 data sheet parameters static and dynamic component performance data supplied by the component manufacturer or supplier 3.6 withstand voltage highest voltage level that does not cause device failure Note 1 to entry: The device passes all tested lower voltages (

43、see failure Window). 3.7 failure window intermediate range of stress voltages that can induce failure in a particular device type, when the device type can pass some stress voltages both higher and lower than this range Note 1 to entry: A component with a failure window may pass a 500 V test, fail a

44、 1 000 V test and pass 2 000 V test. The withstand voltage of this device is 500 V. 3.8 human body model electrostatic discharge HBM ESD ESD event meeting the waveform criteria specified in this standard, approximating the discharge from the fingertip of a typical human being to a grounded device 3.

45、9 HBM ESD tester HBM simulator equipment that applies an HBM ESD to a component 3.10 Ipspeak current value determined by the current at time tmaxon the linear extrapolation of the exponential current decay curve, based on the current waveform data over a 40 nanosecond period beginning at tmaxSEE: Fi

46、gure 2 a). 3.11 Ipsmaxhighest current value measured including the overshoot or ringing components due to internal test simulator RLC parasitics SEE: Figure 2 a). 3.12 no connect pin package interconnection that is not electrically connected to a die BS EN 60749-26:2014 8 60749-26 IEC:2013 EXAMPLE:

47、Pin, bump, ball interconnection. Note 1 to entry: There are some pins which are labelled as no connect, which are actually connected to the die and should not be classified as a no connect pin. 3.13 non-socketed tester HBM simulator that makes contact to the device under test (DUT), pins (or balls,

48、lands, bumps or die pads) with test probes rather than placing the DUT in a socket 3.14 non-supply pins all pins not categorized as supply pins or no connects Note 1 to entry: This includes pins such as input, output, offset adjusts, compensation, clocks, controls, address, data, Vref pins and VPP p

49、ins on EPROM memory. Most non-supply pins transmit or receive information such as digital or analog signals, timing, clock signals, and voltage or current reference levels. 3.15 package plane low impedance metal layer built into an IC package connecting a group of bumps or pins (typically power or ground) Note 1 to entry: There may be multiple package planes (sometimes referred to as islands) for each power and ground group. 3.16 pre-pulse voltage voltage occurring a