ETSI TS 102 361-1-2017 Electromagnetic compatibility and Radio spectrum Matters (ERM) Digital Mobile Radio (DMR) Systems Part 1 DMR Air Interface (AI) protocol (V2 5 1).pdf

1、 ETSI TS 102 361-1 V2.5.1 (2017-10) Electromagnetic compatibility and Radio spectrum Matters (ERM); Digital Mobile Radio (DMR) Systems; Part 1: DMR Air Interface (AI) protocol TECHNICAL SPECIFICATION ETSI ETSI TS 102 361-1 V2.5.1 (2017-10)2Reference RTS/ERM-TGDMR-356 Keywords digital, PMR ETSI 650 R

2、oute des Lucioles F-06921 Sophia Antipolis Cedex - FRANCE Tel.: +33 4 92 94 42 00 Fax: +33 4 93 65 47 16 Siret N 348 623 562 00017 - NAF 742 C Association but non lucratif enregistre la Sous-Prfecture de Grasse (06) N 7803/88 Important notice The present document can be downloaded from: http:/www.et

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7、 ETSI. The copyright and the foregoing restriction extend to reproduction in all media. ETSI 2017. All rights reserved. DECTTM, PLUGTESTSTM, UMTSTMand the ETSI logo are trademarks of ETSI registered for the benefit of its Members. 3GPPTM and LTE are trademarks of ETSI registered for the benefit of i

8、ts Members and of the 3GPP Organizational Partners. oneM2M logo is protected for the benefit of its Members. GSM and the GSM logo are trademarks registered and owned by the GSM Association. ETSI ETSI TS 102 361-1 V2.5.1 (2017-10)3Contents Intellectual Property Rights 9g3Foreword . 9g3Modal verbs ter

9、minology 9g31 Scope 10g32 References 10g32.1 Normative references . 10g32.2 Informative references 11g33 Definitions, symbols and abbreviations . 12g33.1 Definitions 12g33.2 Symbols 14g33.3 Abbreviations . 14g34 Overview 17g34.0 Overview introduction 17g34.1 Protocol architecture. 17g34.1.0 Protocol

10、 architecture - Introduction 17g34.1.1 Air Interface Physical Layer (layer 1). 18g34.1.2 Air Interface Data Link Layer (layer 2) 19g34.1.3 Air Interface Call Control Layer (CCL) (layer 3) . 19g34.2 DMR TDMA structure . 19g34.2.1 Overview of burst and channel structure 19g34.2.2 Burst and frame struc

11、ture 21g34.3 Frame synchronization . 22g34.4 Timing references . 24g34.4.1 Repeater mode BS established timing relationship . 24g34.4.2 Repeater mode MS established timing relationship 24g34.4.3 Direct mode timing relationship . 24g34.4.4 TDMA direct mode timing relationship 24g34.5 Common Announcem

12、ent Channel (CACH) . 24g34.6 Basic channel types 25g34.6.1 Traffic channel with CACH 25g34.6.2 Traffic channel with guard time 26g34.6.3 Bi-directional channel . 26g35 Layer 2 protocol description . 27g35.0 Layer 2 protocol description - Introduction 27g35.1 Layer 2 timing 27g35.1.1 Channel timing r

13、elationship 27g35.1.1.0 Channel timing relationship - Introduction . 27g35.1.1.1 Aligned channel timing . 28g35.1.1.2 Offset channel timing 28g35.1.2 Voice timing . 28g35.1.2.1 Voice superframe 28g35.1.2.2 Voice initiation 29g35.1.2.3 Voice termination 30g35.1.3 Data timing . 30g35.1.3.0 Data timing

14、 - Introduction . 30g35.1.3.1 Single slot data timing . 30g35.1.3.2 Dual slot data timing . 31g35.1.4 Traffic timing 31g35.1.4.1 BS timing 31g35.1.4.2 Single frequency BS timing 32g35.1.4.3 Direct mode timing . 33g35.1.4.4 Time Division Duplex (TDD) timing 33g35.1.4.5 Continuous transmission mode .

15、33g3ETSI ETSI TS 102 361-1 V2.5.1 (2017-10)45.1.4.6 TDMA direct mode timing 34g35.1.5 Reverse Channel (RC) timing . 34g35.1.5.0 Reverse Channel (RC) timing - Introduction 34g35.1.5.1 Embedded outbound Reverse Channel (RC) . 35g35.1.5.2 Dedicated outbound Reverse Channel (RC) . 35g35.1.5.3 Standalone

16、 inbound Reverse Channel (RC) 36g35.1.5.4 Direct mode Reverse Channel (RC) 36g35.2 Channel access . 37g35.2.0 Channel access - Introduction . 37g35.2.1 Basic channel access rules 39g35.2.1.1 Types of channel activity 39g35.2.1.2 Channel status . 39g35.2.1.3 Timing master . 39g35.2.1.4 Hang time mess

17、ages and timers 40g35.2.1.5 Slot 1 and 2 dependency . 40g35.2.1.6 Transmit admit criteria 40g35.2.1.7 Transmission re-tries . 41g35.2.2 Channel access procedure . 41g35.2.2.0 Channel access procedure - Introduction 41g35.2.2.1 Direct mode Channel Access 42g35.2.2.1.0 Direct mode Channel Access - Int

18、roduction 42g35.2.2.1.1 MS Out_of_Sync Channel Access. 42g35.2.2.1.2 MS Out_of_Sync_Channel_Monitored Channel Access . 44g35.2.2.1.3 MS In_Sync_Unknown_System Channel Access . 45g35.2.2.1.4 MS Not_in_Call Channel Access 46g35.2.2.1.5 MS Others_Call Channel Access 46g35.2.2.1.6 MS My_Call Channel Acc

19、ess 46g35.2.2.2 Repeater mode channel access 46g35.2.2.2.0 Repeater mode channel access- Introduction. 46g35.2.2.2.1 MS Out_of_Sync Channel Access. 46g35.2.2.2.2 MS Out_of_Sync_Channel_Monitored Channel Access . 48g35.2.2.2.3 MS In_Sync_Unknown_System channel access . 49g35.2.2.2.4 MS TX_Wakeup_Mess

20、age 50g35.2.2.2.5 MS Not_In_Call channel access 51g35.2.2.2.6 MS Others_Call channel access 52g35.2.2.2.7 MS My_Call channel access 52g35.2.2.2.8 MS In_Session channel access 52g35.2.2.3 Non-time critical CSBK ACK/NACK channel access 52g35.2.2.4 TDMA direct mode channel access 53g35.2.2.4.0 TDMA dir

21、ect mode channel access - Introduction 53g35.2.2.4.1 MS Out_of_Sync channel access 53g35.2.2.4.2 MS Out_of_Sync_Channel_Monitored channel access . 56g35.2.2.4.3 MS In_Sync_Unknown_System channel access . 57g35.2.2.4.4 MS Not_in_Call channel access 58g35.2.2.4.5 MS Others_Call channel access 58g35.2.

22、2.4.6 MS My_Call channel access 58g35.2.2.4.7 Immediate response channel access. 58g36 Layer 2 burst format . 58g36.0 Layer 2 burst format - Introduction 58g36.1 Vocoder socket . 59g36.2 Data and control . 60g36.3 Common Announcement Channel burst . 61g36.4 Reverse Channel . 62g36.4.1 Standalone inb

23、ound Reverse Channel burst 62g36.4.2 Outbound reverse channel (RC) burst . 63g37 DMR signalling 63g37.1 Link Control message structure 63g37.1.0 Link Control message structure - Introduction . 63g37.1.1 Voice LC header . 64g37.1.2 Terminator with LC 65g3ETSI ETSI TS 102 361-1 V2.5.1 (2017-10)57.1.3

24、Embedded signalling. 66g37.1.3.0 Embedded signalling - Introduction 66g37.1.3.1 Outbound channel . 66g37.1.3.2 Inbound channel 67g37.1.4 Short Link Control in CACH 67g37.2 Control Signalling BlocK (CSBK) message structure 68g37.2.0 Control Signaling BlocK (CSBK) message structure - Introduction 68g3

25、7.2.1 Control Signalling BlocK (CSBK) . 68g37.3 Idle message . 69g37.4 Multi Block Control (MBC) message structure 70g37.4.0 Multi Block Control (MBC) message structure - Introduction . 70g37.4.1 Multi Block Control (MBC) . 71g38 DMR Packet Data Protocol (PDP) . 73g38.0 DMR Packet Data Protocol (PDP

26、) - Introduction 73g38.1 Internet Protocol . 73g38.2 Datagram fragmentation and re-assembly 74g38.2.0 Datagram fragmentation and re-assembly - Introduction . 74g38.2.1 Header block structure 75g38.2.1.0 Header block structure - Introduction . 75g38.2.1.1 Unconfirmed data Header . 76g38.2.1.2 Confirm

27、ed data header 77g38.2.1.3 Response data header 77g38.2.1.4 Proprietary data header . 77g38.2.1.5 Status/precoded short data header . 78g38.2.1.6 Raw short data header . 79g38.2.1.7 Defined short data header 79g38.2.1.8 Unified Data Transport (UDT) data header. 80g38.2.2 Data block structure 80g38.2

28、.2.0 Data block structure - Introduction . 80g38.2.2.1 Unconfirmed data block structure . 80g38.2.2.2 Confirmed data block structure . 83g38.2.2.3 Response packet format 86g38.2.2.4 Hang time for response packet 87g38.2.2.5 Unified Data Transport (UDT) last data block structure . 88g38.2.3 Single Bl

29、ock Data structure 89g38.2.3.0 Single Block Data structure - Introduction 89g38.2.3.1 Unified Single Block Data block structure 89g39 Layer 2 PDU description 90g39.0 Layer 2 PDU description - Introduction . 90g39.1 PDUs for voice bursts, general data bursts and the CACH 91g39.1.1 Synchronization (SY

30、NC) PDU . 91g39.1.2 Embedded signalling (EMB) PDU . 91g39.1.3 Slot Type (SLOT) PDU 92g39.1.4 TACT PDU . 92g39.1.5 Reverse Channel (RC) PDU . 92g39.1.6 Full Link Control (FULL LC) PDU 93g39.1.7 Short Link Control (SHORT LC) PDU 93g39.1.8 Control Signalling Block (CSBK) PDU . 93g39.1.9 Pseudo Random F

31、ill Bit (PR FILL) PDU . 93g39.2 Data related PDU description . 94g39.2.0 Data related PDU description - Introduction 94g39.2.1 Confirmed packet Header (C_HEAD) PDU . 94g39.2.2 Rate coded packet Data (R_3_4_DATA) PDU 94g39.2.3 Rate coded Last Data block (R_3_4_LDATA) PDU 95g39.2.4 Confirmed Response

32、packet Header (C_RHEAD) PDU 95g39.2.5 Confirmed Response packet Data (C_RDATA) PDU 96g39.2.6 Unconfirmed data packet Header (U_HEAD) PDU . 96g39.2.7 Rate coded packet Data (R_1_2_DATA) PDU 96g39.2.8 Rate coded Last Data block (R_1_2_LDATA) PDU 97g39.2.9 Proprietary Header (P_HEAD) PDU 97g3ETSI ETSI

33、TS 102 361-1 V2.5.1 (2017-10)69.2.10 Status/Precoded short data packet Header (SP_HEAD) PDU 98g39.2.11 Raw short data packet Header (R_HEAD) PDU 98g39.2.12 Defined Data short data packet Header (DD_HEAD) PDU . 99g39.2.13 Unified Data Transport Header (UDT_HEAD) PDU . 99g39.2.14 Unified Data Transpor

34、t Last Data block (UDT_LDATA) PDU . 99g39.2.15 Rate 1 coded packet Data (R_1_DATA) PDU . 100g39.2.16 Rate 1 coded Last Data block (R_1_LDATA) PDU . 100g39.3 Layer 2 information element coding 101g39.3.0 Layer 2 information element coding - Introduction 101g39.3.1 Colour Code (CC) . 101g39.3.2 Pre-em

35、ption and power control Indicator (PI) 101g39.3.3 LC Start/Stop (LCSS) . 101g39.3.4 EMB parity . 102g39.3.5 Feature set ID (FID) 102g39.3.6 Data Type 102g39.3.7 Slot Type parity 102g39.3.8 Access Type (AT) . 103g39.3.9 TDMA Channel (TC) 103g39.3.10 Protect Flag (PF) . 103g39.3.11 Full Link Control O

36、pcode (FLCO) . 103g39.3.12 Short Link Control Opcode (SLCO) . 103g39.3.13 TACT parity 104g39.3.14 RC parity . 104g39.3.15 Group or Individual (G/I) . 104g39.3.16 Response Requested (A) . 104g39.3.17 Data Packet Format (DPF) 104g39.3.18 SAP identifier (SAP) 104g39.3.19 Logical Link ID (LLID) 105g39.3

37、.20 Full message flag (F) 105g39.3.21 Blocks to Follow (BF) 105g39.3.22 Pad Octet Count (POC) . 105g39.3.23 Re-Synchronize Flag (S) . 106g39.3.24 Send sequence number (N(S) 106g39.3.25 Fragment Sequence Number (FSN) 106g39.3.26 Data Block Serial Number (DBSN) 107g39.3.27 Data block CRC (CRC-9) . 107

38、g39.3.28 Class (Class) . 107g39.3.29 Type (Type) 108g39.3.30 Status (Status) . 108g39.3.31 Last Block (LB) 108g39.3.32 Control Signalling BlocK Opcode (CSBKO) . 108g39.3.33 Appended Blocks (AB) . 108g39.3.34 Source Port (SP) . 109g39.3.35 Destination Port (DP) 109g39.3.36 Status/Precoded (S_P). 109g

39、39.3.37 Selective Automatic Repeat reQuest (SARQ) 109g39.3.38 Defined Data format (DD) 109g39.3.39 Unified Data Transport Format (UDT Format) 110g39.3.40 Void 111g39.3.41 Supplementary Flag (SF) 111g39.3.42 Pad Nibble 111g39.3.43 Service Type . 111g310 Physical Layer 111g310.1 General parameters . 1

40、11g310.1.0 General parameters - Introduction 111g310.1.1 Frequency range 112g310.1.2 RF carrier bandwidth 112g310.1.3 Transmit frequency error 112g310.1.4 Time base clock drift error 112g310.2 Modulation . 112g310.2.1 Symbols 112g3ETSI ETSI TS 102 361-1 V2.5.1 (2017-10)710.2.2 4FSK generation . 113g

41、310.2.2.0 4FSK generation - Introduction. 113g310.2.2.1 Deviation index . 113g310.2.2.2 Square root raised cosine filter 113g310.2.2.3 4FSK Modulator . 113g310.2.3 Burst timing 114g310.2.3.0 Burst timing - Introduction 114g310.2.3.1 Normal burst . 114g310.2.3.1.0 Normal burst - Introduction . 114g31

42、0.2.3.1.1 Power ramp time 115g310.2.3.1.2 Symbol timing . 116g310.2.3.1.3 Propagation delay and transmission time 116g310.2.3.2 Reverse channel (RC) burst. 117g310.2.3.2.0 Reverse channel (RC) burst - Introduction 117g310.2.3.2.1 Power ramp time 117g310.2.3.2.2 Symbol timing . 118g310.2.3.2.3 Propag

43、ation delay 119g310.2.3.3 Synthesizer Lock-Time constraints . 119g310.2.3.4 Transient frequency constraints during symbol transmission time . 119g3Annex A (normative): Numbering and addressing . 120g3Annex B (normative): FEC and CRC codes 121g3B.0 FEC and CRC codes - Introduction 121g3B.1 Block Prod

44、uct Turbo Codes . 122g3B.1.1 BPTC (196,96) . 122g3B.2 Variable length BPTC 126g3B.2.1 Variable length BPTC for embedded signalling . 126g3B.2.2 Single Burst Variable length BPTC 128g3B.2.2.1 Non-Reverse Channel Single Burst BPTC . 128g3B.2.2.2 Reverse Channel Single Burst BPTC 129g3B.2.3 Variable le

45、ngth BPTC for CACH signalling 130g3B.2.4 Rate Trellis code . 133g3B.2.5 Rate 1 coded data . 137g3B.3 Generator matrices and polynomials 139g3B.3.1 Golay (20,8) . 139g3B.3.2 Quadratic residue (16,7,6) 139g3B.3.3 Hamming (17,12,3) 140g3B.3.4 Hamming (13,9,3), Hamming (15,11,3), and Hamming (16,11,4) .

46、 140g3B.3.5 Hamming (7,4,3) 141g3B.3.6 Reed-Solomon (12,9) . 141g3B.3.7 8-bit CRC calculation . 143g3B.3.8 CRC-CCITT calculation . 144g3B.3.9 32-bit CRC calculation . 144g3B.3.10 CRC-9 calculation 146g3B.3.11 5-bit Checksum (CS) calculation 147g3B.3.12 Data Type CRC Mask 147g3B.3.13 7-bit CRC calcul

47、ation . 148g3B.4 Interleaving . 149g3B.4.1 CACH interleaving . 149g3Annex C (informative): Example timing diagrams . 150g3C.0 General . 150g3C.1 Direct mode timing . 150g3C.2 Reverse Channel timing . 150g3Annex D (normative): Idle and Null message bit definition . 151g3ETSI ETSI TS 102 361-1 V2.5.1

48、(2017-10)8D.0 Idle and Null message bit definition - Introduction 151g3D.1 Null embedded message bit definitions 151g3D.2 Idle message bit definitions 152g3Annex E (normative): Transmit bit order . 154g3Annex F (normative): Timers and constants in DMR 167g3F.0 Timers and constants in DMR - Introduct

49、ion . 167g3F.1 Layer 2 timers . 167g3F.2 Layer 2 constants 168g3Annex G (informative): High level states overview . 169g3G.0 High level states overview - Introduction 169g3G.1 High Level MS states and SDL description . 169g3G.1.0 General . 169g3G.1.1 MS Level 1 SDL 169g3G.1.2 MS Level 2 SDL 172g3G.2 High level BS states and SDL descriptions 174g3G.2.0 High level BS states and SDL descriptions - Introduction . 174g3G.2.1 BS Both Slots SDL . 174g3G.2.2 BS Single Slot SDL 175g3Annex H (normative): Feature interoperability 177g3H.0 Feature interoperability - Introduction