ITU-T V 32 BIS-1991 A DUPLEX MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 14 400 bit s FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON LEASED POINT-TO-POINT 2-WIRE TE.pdf

1、- CCITT RECMN*V*32 BIS 71 4862591 05b3470 5 INTERNATIONAL TELECOMMUNICATION UNION CCITT THE INTERNATIONAL TELEGRAPH AND TELEPHONE CONSULTATIVE COMMITTEE DATA COMMUNICATION OVER THE TELEPHONE NETWORK V.32 bis A DUPLEX MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 14400 bitk FOR USE ON THE GENERAL

2、 SWITCHED TELEPHONE NETWORK AND ON LEASED POINT-TO-POINT 2-WIRE TELEPHONE-TY PE CIRCUITS Recommendation V.32 bis I Geneva, 1991 . CCITT RECMN*V.32 BIS 92 1 4862572 05b3471 7-1 INTERNATIONAL TELECOMMUNICATION UN ION CCITT THE INTERNATIONAL TELEGRAPH AND TELEPHONE CONS U LTAT IV E COM M ITTE E DATA CO

3、MMUNICATION OVER THE TELEPHONE NETWORK V.32 bis A DUPLEX MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 14400 bit/s FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON LEASED POINT-TO-POINT 2-WIRE TELEPHONE-TYPE CIRCUITS Recommendation V.32 bis CCITT RECMN*V*32 BIS 71 = 4862593 0563472 9 E F

4、OREWORD The CCITT (the International Telegraph and Telephone Consultative Committee) is a permanent organ of the Intemational Telecommunication Union (ITU). CCITT is responsible for studying technical, operating and tariff questions and issuing Recommendations on them with a view to standardizing te

5、lecommunications on a worldwide basis. The Plenary Assembly of CCITT which meets every four years, establishes the topics for study and approves Recommendations prepared by its Study Groups. The approval of Recommendations by the members of CCITT between Plenary Assemblies is covered by the procedur

6、e laid down in CCITT Resolution No. 2 (Melbourne, 1988). Recommendation V.32 bis was prepared by Study Group XVII and was approved under the Resolution No. 2 procedure on the 22 of February 199 1, CCIIT NOTE In this Recommendation, the ex ression “Administration” is used for conciseness to indicate

7、both telecommunication Administration and a recognized private operating agency. O IT 1991 All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from th

8、e ITU. CCITT RECMN*V.32 BIS 71 48b2571 05b3433 O = I Recommendation V.32 bis A DCPLEX MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 14400 bit/s FOR CSE ON THE GENERAL SWITCHED TELEPHONE SETWORK AND ON LEASED POINT-TO-POINT 2-WIRE TELEPHOSE -TYPE CIRCUITS 1 Introduction This modem is intcnded for

9、 use on connections on general switched telephone networks (GSTNs) and on point-to-point ,-wire leased telephone-type circuits. The principal characteristics of the modem are as follows: a) b) c) quadrature amplitudc modulation for each channel with synchronous line transmission at 2400 duplex mode

10、of operation on GSTN and point-to-point 2-wire leased circuits; channel separation by echo cancellation techniques; symbols/s; the following synchronous data signalling rates shall be implemented in the modem: - - - 9600 biUs trellis coded, - 7200 bit/s trellis coded, - 4800 bit/s uncodcd; compatibi

11、lity with Rccommcndation V.32 modems at 9600 and 4800 bit/s; exchange of ratc scquences during start-up to establish thc data signalling rate; a procedure to changc the data signalling rate without retraining. d) 14 400 bit/s trcllis coded, 12 O00 bit/s trellis codcd, e) f) g) Nore 1 - On internatio

12、nal GSTN connections that utilize circuits that are in accord with Recommcn- dation (3.235 (16-channel terminal equipments), it may be necessary to employ a greater degree of equalization within thc modcm than would be required for use on most national GSTN connections. Note 2 - The transmit and rcc

13、eive rates in each modem shall be the same. The possibility of asymmetric working rcmains for further study. 2 Line signals 2.1 Carrier frequency and mouiation rate The carrier frequency is to be 1800 I 1 Hz. The receiver must be able to operate with a maximum received frequency offset of up to +7 H

14、z. The modulation rate shall be 2400 symbols/s 0.01%. 2.2 Transmitted spectrum The transmitted power level must conform to Recommendation V.2. With continuous binary ones applied to the input of the scrambler, the transmitted energy density at 600 Hz and 3000 Hz shall be attenuated 4.5 k 2.5 dB with

15、 respect to the maximum energy density between 600 Hz and 3 O00 Hz. Recommendation V.32 bis 1 CCITT RECMN8V.32 BIS 71 O 48b2593 05b3474 2 I ., 2.3 Coding 2.3.1 Signal element coding for 14 400 bitls At 14 400 bits per second, the scrambled data stream to be transmitted is divided into groups of six

16、consecutivc data bits. The first two bits in time Q1, and Q2, in each group, where the subscript n designates the sequencc number of the group, are first differentially encoded into Y1, and Y2, according to Table lfV.32 bis. The two diferentially encoded bits Y ln and Y2n are used as input to a syst

17、ematic convolutional encodcr which generates a redundant bit YOn (see Figure 1N.32 bis). This redundant bit and the six information-carrying bits Yin, Y2n, Q3n, Q4, Q5, 46, are then mapped into the coordinates of the signal element to bc transmitted according to the signal space diagram shown in Fig

18、ure 2-1lV.32 bis. TABLE 1N.32 bis Differential quadrant coding with trellis coding Inputs QI, 42“ O O O O O O O O O 1 O 1 O 1 O 1 1 O 1 O 1 O 1 O 1 1 1 1 1 1 1 1 Previous outputs YI,-1 Y2n-1 O O O 1 1 O 1 1 O O O 1 1 O 1 1 O O O 1 1 O 1 1 O O O 1 1 O 1 1 2.3.2 Signal element coding for 12 O00 bitls

19、O O o 1 1 O 1 1 O 1 O O 1 1 1 O 1 O 1 1 O 1 O O 1 1 1 O O O O 1 At 12 O00 bits per second, the scrambled data stream to be transmitted is divided into groups of five consccutivc data bits. The first two bits in time Q1, and 42, in each group, where the subscript n designates the sequence number of t

20、he group, are first differentially encoded into Y ln and Y2, according to Table 1fV.32 bis. The two differcntially encoded bits Y 1, and Y2, are used as input to a systematic convolutional encoder which generates a redundant bit YO, (see Figure 1R.32 bis). This redundant bit and the five information

21、-carrying bits Y ln, Y2n, Q3n, Q4n, Q5, are then mapped into the coordinates of the signal element to be transmitted according to the signal space diagram shown in Figure 2-2lV.32 bis. 2 Recommendation V.32 bis CCITT RECMNxV.32 BIS 71 m 4862593 0563475 4 m I 1 14 400 biVs Q6n b Q6n 14 400 and 12 O00

22、 biVs Q5 n bQ5n 14 400, 12 O00 and 9600 biWs CS, b Wn 14 400, 12 000,9600 and 7200 biVs Q3 n Table 1 lV.32 bis an+ Qin+ A b Ib rl T1701300-90 Symbol truth table FIGURE 1m.32 bis Trellis encoder Recommendation V.32 bis 3 4 CCITT RECMNaV.32 BIS 71 I 4862573 0563476 b I 900 Um) o1 10000 o111000 1100000

23、 111;001 l8 110;000 llioool 4 O010011 o101001 0010111 0100001 o010101 Y* 101;101 1000011 lo17111 1000111 101;011 1000101 0110101 o001101 0110100 0001111 o111100 0001011 O111101 a f* * * 1100101 1111011 1100100 1111010 1101100 1110010 1101101 1110011 0010001 o101011 O010010 o101010 0010110 0100010 00

24、10100 O100011 O010000 1011000 1000001 1011100 1000010 1000100 1011001 1000000 0001000 0110111 0001100 0110110 0001110 0111110 0001010 0111111 0001001 * a I (Re) -8 -6 -4, -2 2 4 6 8 180“ I 1100111 I 1111111 1100110 I 1111110 1101110 1110110 1101111 1110111 00 0011001 0101111 0011010 0101110 0011110

25、0100110 o011100 o100111 0011000 Y* * 1010000 1001001 1010100 1001010 1010110 1001110 1010010 1001100 1010001 1001000 0000000 o110011 0000100 O110010 0000110 o111010 0000010 0111011 o000001 a f“* a 1100011 1111101 1100010 1111100 1101010 1110100 1101011 1110101 0101101 o011011 0101100 0011111 0100100

26、 o011101 0100101 *Y 101.0101 100f011 1010111 100111 1010011 100:*01 0000101 O110001 o000111 0111001 0000011 ts* 1100001 1111000 1101001 1110000 O101000 2700 0100000 Note - Binary numbers refer to YO, Yl;, Y2, Q3n, Q4, Q5, Q6,. A, B, C, D refer to synchronizing signal elements. FIGURE 2-1N.32 bis Sig

27、nal space diagram and mapping for modulation at 14 400 bids per second T1701310-90 Recommendation V.32 bis CCITT RECMN*V.32 BIS”sL W 4862593 O563477 mI-3 o . . 90 001010 100010 011111 I I1000 o . 10101: o0001 I 110111 010000 . . . o oiiiin I I1001 001100 100100 . . . o iiniio .6 OICOOI -J OIIOI -2 0

28、00101 +- 180” . . 011100 111101 o 1000oo 001000 . o . . 101111 0001 11 110100 010101 . . . . o1 1010 111011 001001 IOM)O1 . . . . 110010 01001 1 101110 0001 IO m) . 001110 6 101001 4 o 011101 2 o 110101 a 001101 -2 o 101100 4 o o1 1000 -6 o 1 IWO0 o 100110 o 000001 a 111100 o 2 O10100 - o 100101 o 0

29、00100 o o 0101 11 o a 011011 111010 o o 110011 010010 o o yo?) 001111 4 101000 6 000000 O11001 111110 o 110001 010110 o 001011 10001 1 o a 101010 000010 T1701320-90 270” ,Vole - Binary numbers refer to YO, YI, Y2, Q3,. Q4, Q5,. A, B, C, D refer to synchronizing signal elements. FIGURE 2-2m.32 bis Si

30、gnal space diagram and mapping for modulation at 12 O00 bids per second 2.3.3 Signal element coding for 9600 bitls At 9600 bits per second, the scrambled data stream to be transmitted is divided into groups of four consecutive data bits. The first two bits in time Q1, and Q2n in each group, where th

31、e subscript n designates the sequence number of the group, are first differentially encoded into Y1n and Y2n according to Table 1N.32 bis. The two differentially encoded bits Y 1, and Y2, are used as input to a systematic convolutional encoder which generates a redundant bit YO, (see Figure W.32 bis

32、). This redundant bit and the four information-carrying bits Yln, Y2, Q3n, Q4, are then mapped into the coordinates of the signal element to be transmitted according to the signal space diagram shown in Figure 2-3m.32 bis. 2.3.4 Signal element coding for 7200 bitls At 7200 bits per second, the scram

33、bled data stream to be transmitted is divided intogroups of three consecutive data bits. The first two bits in time Q1, and Q2n in each group, where the subscript n designates the sequence number of the group, are first differentially encoded into Y1n and Y2n according to Table 1N.32 bis. The two di

34、fferentially encoded bits Y 1, and Y2n are used as input to a systematic convolutionai encoder which generates a redundant bit YO, (see Figure lm.32 bis). This redundant bit and the three information-carrying bits Yln, Y2nl Q3n, are then mapped into the coordinates of the signal element to be transm

35、itted according to the signal space diagram shown in Figure 2-4N.32 bis. Recommendation V.32 bis 5 I 11110 180“ 11001 FIGURE 2-3m.32 bis Signal space diagram and mapping for modulation at 9600 bitls per second I 00 11010 11 101 at 0 . 0 o O010 1110 1011 180“ 00 . 0110 11-11 1001 0 0 0 O000 1010 1100

36、 0101 270“ T1701340-90 Note - Binary numbers refer to YO, Yl, Y2, . A, B, C, D refer to synchronizing signal elements. FIGURE 2-4N.32bi.s Signal space diagram and mapping for modulation at 7200 bids per second 6 Recommendation V.32 bis 2.3.5 Signal element coding for 4800 bitls At 4800 bits per seco

37、nd, the scrambled data stream to be transmitted is divided into groups of two consecutive data bits. The two bits Q1n and Q2n, where Qln is first in time, where the subscript n designates the sequence number of the group, are first differentially encoded into Y 1, and Y2, according to Table 2N.32 bi

38、s. The two differentially encoded bits Y1n and Y2, are then mapped into the coordinates of the signal element to be transmitted according to the signal space diagram shown in Figure 2-5R.32 bis. TABLE 2N.32 bis Differential quadrant coding for 4800 bids Inputs I Phase quadrant change Previous output

39、s outputs Signal state for 4800 bit/s Q1n Q2n +goo O“ +180 1 C O D 1 R +270“ C 1 1 B I Io Re) 270“ Note - Binary numbers refer to Y1, and Y2, . A, B, C, D refer to synchronizing signal elements. FIGURE 2-5/V.32bis Signal space diagram and mapping for modulation at 4800 bids per second Recommendation

40、 V.32 bis 7 CCITT RECMN*V.32 BIS 91 m 4862573 05634Q I! W 3 DTE interface When a standardized physical interface for the interchange circuits is not present, the equivalent functionality of the circuits must still be provided (see Table 3N.32 bis). TABLE 3JV.32 bis No. 102 103 104 105 106 107 108/1

41、or 108/2 109 113 114 115 125 140 141 142 Interchange circuit Description Signal ground or common return Transmitted data Received data Request to send Ready for sending Data set ready Connect data set to line Data terminal ready Data channel received line signal detector Transmitter signal element t

42、iming (DTE source) Transmitter signal element timing (DCE source) Receiver signal element timing (DCE source) Calling indicator Loopbacldmaintenance Local loopback Test indicator Note 1 Note 1 Note 2 Note 3 Note 3 Note 1 - This circuit shall be capable of operation as circuit 108/1 or circuit 108/2

43、depending on its use. Operation of circuits 107 and 108/1 shall be in accordance with $4.4 of Recommendation V.24. Note 2 - When the modem is not operating in a synchronous mode at the interface, any signals on this circuit shall be disregarded. Many DTEs operating in an asynchronous mode do not hav

44、e a generator connected to this circuit. Note 3 -When the modem is not operating in a synchronous mode at the interface, this circuit shall be clamped to the OFF condition. Many DTEs operating in an asynchronous mode do not terminate this circuit. 3.1 Synchronous interfacing The modems shall accept

45、synchronous data from the DE on circuit 103 (see Recommendation V.24) under control of circuit 113 or 114. The modem shall pass synchronous data to the DTE on circuit 104 under the control of circuit 115. The modem shall provide to the DTE, a clock on circuit 114 for transmit-data timing, and a cloc

46、k on circuit 115 for receive-data timing. The transmit-data timing may, however, originate in the DTE and be transferred to the modem via circuit 113. In some applications, it may be necessary to slave the transmitter timing to the receiver timing inside the modem. After the start-up and retrain seq

47、uences, circuit 106 must follow the state of circuit 105 within 2 ms. OFF to ON and ON to OFF transitions of circuit 109 should occur solely in accordance with the operating sequences defined in 4 5. Thresholds and response times are inapplicable because a line signal detector cannot be expected to

48、distinguish wanted received signals from unwanted talker echos. 8 Recommendation V.32 bis 3.2 Asynchronous character-mode interfacing The modulation process operates synchronously. However, the modem may be associated with an asynchronous to synchronous conversion entity interfacing to the DTE in an

49、 asynchronous (or start-stop character) mode. The protocol for conversion shall be in accordance with Recommendations V.14 or V.42. Other facilities such as data compression may also be employed. 3.3 Electrical characteristics of interchange circuits When a standardized physical interface is provided, the electrical characteristics conforming to Recommendation V.28 will normally be used. Alternatively, the electrical characteristics conforming to Recommendations V.10 and V.11 may be used. The connector and pole assignments spec